Pierre E Elisca
Examiner (ID: 9174, Phone: (571)272-6706 , Office: P/3716 )
Most Active Art Unit | 3715 |
Art Unit(s) | 3718, 2785, 3714, 3716, 2131, 3621, 2161, 3715 |
Total Applications | 2631 |
Issued Applications | 2140 |
Pending Applications | 221 |
Abandoned Applications | 269 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6590842
[patent_doc_number] => 20100001322
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-07
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/088733
[patent_app_country] => US
[patent_app_date] => 2006-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2323
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20100001322.pdf
[firstpage_image] =>[orig_patent_app_number] => 12088733
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/088733 | SEMICONDUCTOR DEVICE | Oct 4, 2006 | Abandoned |
Array
(
[id] => 4965343
[patent_doc_number] => 20080108163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-08
[patent_title] => 'Microelectromechanical system device and method for preparing the same for subsequent processing'
[patent_app_type] => utility
[patent_app_number] => 11/541993
[patent_app_country] => US
[patent_app_date] => 2006-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2923
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0108/20080108163.pdf
[firstpage_image] =>[orig_patent_app_number] => 11541993
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/541993 | Preparation of microelectromechanical system device using an anti-stiction material and selective plasma sputtering | Oct 1, 2006 | Issued |
Array
(
[id] => 4944139
[patent_doc_number] => 20080081464
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-03
[patent_title] => 'METHOD OF INTEGRATED SUBSTRATED PROCESSING USING A HOT FILAMENT HYDROGEN RADICAL SOUCE'
[patent_app_type] => utility
[patent_app_number] => 11/537573
[patent_app_country] => US
[patent_app_date] => 2006-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 10960
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0081/20080081464.pdf
[firstpage_image] =>[orig_patent_app_number] => 11537573
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/537573 | METHOD OF INTEGRATED SUBSTRATED PROCESSING USING A HOT FILAMENT HYDROGEN RADICAL SOUCE | Sep 28, 2006 | Abandoned |
Array
(
[id] => 4820851
[patent_doc_number] => 20080122107
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'POLY SILICON HARD MASK'
[patent_app_type] => utility
[patent_app_number] => 11/534553
[patent_app_country] => US
[patent_app_date] => 2006-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3133
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0122/20080122107.pdf
[firstpage_image] =>[orig_patent_app_number] => 11534553
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/534553 | POLY SILICON HARD MASK | Sep 21, 2006 | Abandoned |
Array
(
[id] => 4820751
[patent_doc_number] => 20080122038
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'GUARD RING STRUCTURE WITH METALLIC MATERIALS'
[patent_app_type] => utility
[patent_app_number] => 11/532243
[patent_app_country] => US
[patent_app_date] => 2006-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 1986
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0122/20080122038.pdf
[firstpage_image] =>[orig_patent_app_number] => 11532243
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/532243 | GUARD RING STRUCTURE WITH METALLIC MATERIALS | Sep 14, 2006 | Abandoned |
Array
(
[id] => 4711239
[patent_doc_number] => 20080299765
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'Method of Fabricating a Structure for a Semiconductor Device'
[patent_app_type] => utility
[patent_app_number] => 12/067494
[patent_app_country] => US
[patent_app_date] => 2006-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2390
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0299/20080299765.pdf
[firstpage_image] =>[orig_patent_app_number] => 12067494
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/067494 | Method for fabricating a structure for a semiconductor device using a halogen based precursor | Sep 14, 2006 | Issued |
Array
(
[id] => 32572
[patent_doc_number] => 07790612
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-07
[patent_title] => 'Increased grain size in metal wiring structures through flash tube irradiation'
[patent_app_type] => utility
[patent_app_number] => 11/531873
[patent_app_country] => US
[patent_app_date] => 2006-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 35
[patent_no_of_words] => 9335
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 25
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/790/07790612.pdf
[firstpage_image] =>[orig_patent_app_number] => 11531873
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/531873 | Increased grain size in metal wiring structures through flash tube irradiation | Sep 13, 2006 | Issued |
Array
(
[id] => 151732
[patent_doc_number] => 07678699
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-16
[patent_title] => 'Method of forming an insulating capping layer for a copper metallization layer by using a silane reaction'
[patent_app_type] => utility
[patent_app_number] => 11/531084
[patent_app_country] => US
[patent_app_date] => 2006-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 6735
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/678/07678699.pdf
[firstpage_image] =>[orig_patent_app_number] => 11531084
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/531084 | Method of forming an insulating capping layer for a copper metallization layer by using a silane reaction | Sep 11, 2006 | Issued |
Array
(
[id] => 4517603
[patent_doc_number] => 07910967
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-22
[patent_title] => 'Ferroelectric capacitor having three-dimensional structure, nonvolatile memory device having the same and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/515024
[patent_app_country] => US
[patent_app_date] => 2006-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 5377
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/910/07910967.pdf
[firstpage_image] =>[orig_patent_app_number] => 11515024
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/515024 | Ferroelectric capacitor having three-dimensional structure, nonvolatile memory device having the same and method of fabricating the same | Sep 4, 2006 | Issued |
Array
(
[id] => 4711220
[patent_doc_number] => 20080299746
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'Semiconductor Substrate Fabrication Method'
[patent_app_type] => utility
[patent_app_number] => 12/064584
[patent_app_country] => US
[patent_app_date] => 2006-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 4440
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0299/20080299746.pdf
[firstpage_image] =>[orig_patent_app_number] => 12064584
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/064584 | Semiconductor substrate fabrication by etching of a peeling layer | Aug 23, 2006 | Issued |
Array
(
[id] => 359594
[patent_doc_number] => 07485473
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-03
[patent_title] => 'Methods for forming semiconducting device with titanium nitride orientation layer'
[patent_app_type] => utility
[patent_app_number] => 11/464214
[patent_app_country] => US
[patent_app_date] => 2006-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 28
[patent_no_of_words] => 7825
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/485/07485473.pdf
[firstpage_image] =>[orig_patent_app_number] => 11464214
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/464214 | Methods for forming semiconducting device with titanium nitride orientation layer | Aug 13, 2006 | Issued |
Array
(
[id] => 4825887
[patent_doc_number] => 20080124847
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'Reducing Crystal Defects from Hybrid Orientation Technology During Semiconductor Manufacture'
[patent_app_type] => utility
[patent_app_number] => 11/462424
[patent_app_country] => US
[patent_app_date] => 2006-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 1971
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0124/20080124847.pdf
[firstpage_image] =>[orig_patent_app_number] => 11462424
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/462424 | Reducing Crystal Defects from Hybrid Orientation Technology During Semiconductor Manufacture | Aug 3, 2006 | Abandoned |
Array
(
[id] => 5202389
[patent_doc_number] => 20070023868
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'Method of forming copper metal line and semiconductor device including the same'
[patent_app_type] => utility
[patent_app_number] => 11/494643
[patent_app_country] => US
[patent_app_date] => 2006-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2387
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0023/20070023868.pdf
[firstpage_image] =>[orig_patent_app_number] => 11494643
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/494643 | Method of forming copper metal line and semiconductor device including the same | Jul 27, 2006 | Abandoned |
Array
(
[id] => 4657665
[patent_doc_number] => 20080026526
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-31
[patent_title] => 'METHOD FOR REMOVING NANOCLUSTERS FROM SELECTED REGIONS'
[patent_app_type] => utility
[patent_app_number] => 11/459837
[patent_app_country] => US
[patent_app_date] => 2006-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5223
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0026/20080026526.pdf
[firstpage_image] =>[orig_patent_app_number] => 11459837
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/459837 | Method for removing nanoclusters from selected regions | Jul 24, 2006 | Issued |
Array
(
[id] => 602395
[patent_doc_number] => 07432158
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-10-07
[patent_title] => 'Method for retaining nanocluster size and electrical characteristics during processing'
[patent_app_type] => utility
[patent_app_number] => 11/459843
[patent_app_country] => US
[patent_app_date] => 2006-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 20
[patent_no_of_words] => 5195
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/432/07432158.pdf
[firstpage_image] =>[orig_patent_app_number] => 11459843
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/459843 | Method for retaining nanocluster size and electrical characteristics during processing | Jul 24, 2006 | Issued |
Array
(
[id] => 4908402
[patent_doc_number] => 20080019168
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-24
[patent_title] => 'MEMORY STRUCTURE AND DATA WRITING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/459594
[patent_app_country] => US
[patent_app_date] => 2006-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 3570
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0019/20080019168.pdf
[firstpage_image] =>[orig_patent_app_number] => 11459594
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/459594 | MEMORY STRUCTURE AND DATA WRITING METHOD THEREOF | Jul 23, 2006 | Abandoned |
Array
(
[id] => 369824
[patent_doc_number] => 07476597
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-13
[patent_title] => 'Methods and systems for laser assisted wirebonding'
[patent_app_type] => utility
[patent_app_number] => 11/456404
[patent_app_country] => US
[patent_app_date] => 2006-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3079
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/476/07476597.pdf
[firstpage_image] =>[orig_patent_app_number] => 11456404
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/456404 | Methods and systems for laser assisted wirebonding | Jul 9, 2006 | Issued |
Array
(
[id] => 4977447
[patent_doc_number] => 20070218680
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-20
[patent_title] => 'Method for fabricating semiconductor device and method for fabricating magnetic head'
[patent_app_type] => utility
[patent_app_number] => 11/475163
[patent_app_country] => US
[patent_app_date] => 2006-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 12782
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0218/20070218680.pdf
[firstpage_image] =>[orig_patent_app_number] => 11475163
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/475163 | Method for fabricating semiconductor device and method for fabricating magnetic head | Jun 26, 2006 | Abandoned |
Array
(
[id] => 5038198
[patent_doc_number] => 20070090480
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-26
[patent_title] => 'Solid-state imaging device and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/474654
[patent_app_country] => US
[patent_app_date] => 2006-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5243
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0090/20070090480.pdf
[firstpage_image] =>[orig_patent_app_number] => 11474654
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/474654 | Solid-state imaging device and method for manufacturing the same | Jun 25, 2006 | Abandoned |
Array
(
[id] => 5730360
[patent_doc_number] => 20060255474
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-16
[patent_title] => 'Packaging structure and method'
[patent_app_type] => utility
[patent_app_number] => 11/444894
[patent_app_country] => US
[patent_app_date] => 2006-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1535
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0255/20060255474.pdf
[firstpage_image] =>[orig_patent_app_number] => 11444894
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/444894 | Packaging structure and method | May 31, 2006 | Abandoned |