Search

Pierre E Elisca

Examiner (ID: 9174, Phone: (571)272-6706 , Office: P/3716 )

Most Active Art Unit
3715
Art Unit(s)
3718, 2785, 3714, 3716, 2131, 3621, 2161, 3715
Total Applications
2631
Issued Applications
2140
Pending Applications
221
Abandoned Applications
269

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15807787 [patent_doc_number] => 20200127036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => SOLID-STATE IMAGING DEVICE AND MANUFACTURING METHOD OF THE SAME, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/718888 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14872 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16718888 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/718888
Solid-state imaging device, manufacturing method of the same, and electronic apparatus having filters of different thicknesses Dec 17, 2019 Issued
Array ( [id] => 16905019 [patent_doc_number] => 20210183935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => BACKSIDE REFRACTION LAYER FOR BACKSIDE ILLUMINATED IMAGE SENSOR AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/715318 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8829 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715318 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/715318
Backside refraction layer for backside illuminated image sensor and methods of forming the same Dec 15, 2019 Issued
Array ( [id] => 19399820 [patent_doc_number] => 12074208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Method of making triple well isolated diode [patent_app_type] => utility [patent_app_number] => 16/700933 [patent_app_country] => US [patent_app_date] => 2019-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700933 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/700933
Method of making triple well isolated diode Dec 1, 2019 Issued
Array ( [id] => 15906461 [patent_doc_number] => 20200152751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => SOURCE AND DRAIN CONTACT CUT LAST PROCESS TO ENABLE WRAP-AROUND-CONTACT [patent_app_type] => utility [patent_app_number] => 16/687736 [patent_app_country] => US [patent_app_date] => 2019-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16687736 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/687736
Source and drain contact cut last process to enable wrap-around-contact Nov 18, 2019 Issued
Array ( [id] => 16286294 [patent_doc_number] => 20200279896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => LIGHT EMITTING DIODE DISPLAY PANEL AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/673168 [patent_app_country] => US [patent_app_date] => 2019-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16673168 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/673168
Light emitting diode display panel with one or more encapsulation layers and manufacturing method thereof Nov 3, 2019 Issued
Array ( [id] => 17464121 [patent_doc_number] => 20220077427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => DISPLAY DEVICE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 17/416359 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17416359 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/416359
DISPLAY DEVICE AND METHOD FOR MANUFACTURING SAME Oct 24, 2019 Pending
Array ( [id] => 18277222 [patent_doc_number] => 11616172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Semiconductor light emitting device with frosted semiconductor layer [patent_app_type] => utility [patent_app_number] => 16/657403 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 11525 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16657403 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/657403
Semiconductor light emitting device with frosted semiconductor layer Oct 17, 2019 Issued
Array ( [id] => 19444492 [patent_doc_number] => 12094781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Manufacturing method of three-dimensional semiconductor device [patent_app_type] => utility [patent_app_number] => 16/971449 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 39 [patent_no_of_words] => 10782 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16971449 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/971449
Manufacturing method of three-dimensional semiconductor device Sep 12, 2019 Issued
Array ( [id] => 15415295 [patent_doc_number] => 20200027970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => FinFETs having Epitaxial Capping Layer on Fin and Methods for Forming the Same [patent_app_type] => utility [patent_app_number] => 16/570409 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4454 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570409 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570409
FinFETs having epitaxial capping layer on fin and methods for forming the same Sep 12, 2019 Issued
Array ( [id] => 16677756 [patent_doc_number] => 20210066522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => Quantum Dot Structure, Radiation Conversion Element and Light-Emitting Device [patent_app_type] => utility [patent_app_number] => 16/551651 [patent_app_country] => US [patent_app_date] => 2019-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16551651 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/551651
Quantum dot structure having a barrier region and a trap region, radiation conversion element and light-emitting device Aug 25, 2019 Issued
Array ( [id] => 15274841 [patent_doc_number] => 20190386155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => DECOUPLING FINFET CAPACITORS [patent_app_type] => utility [patent_app_number] => 16/546670 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16546670 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/546670
Decoupling FinFET capacitors Aug 20, 2019 Issued
Array ( [id] => 16226448 [patent_doc_number] => 20200251565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => GATE STRUCTURE OF SPLIT-GATE METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/532504 [patent_app_country] => US [patent_app_date] => 2019-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16532504 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/532504
GATE STRUCTURE OF SPLIT-GATE METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF Aug 5, 2019 Abandoned
Array ( [id] => 15718549 [patent_doc_number] => 20200106042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/508836 [patent_app_country] => US [patent_app_date] => 2019-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16508836 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/508836
Display device having a dummy area between hole sealant and display sealant Jul 10, 2019 Issued
Array ( [id] => 16402408 [patent_doc_number] => 20200343266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => CROSS-POINT MULTILAYER STACKABLE FERROELECTRIC FIELD-EFFECT TRANSISTOR RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 16/397524 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397524 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397524
Cross-point multilayer stackable ferroelectric field-effect transistor random access memory Apr 28, 2019 Issued
Array ( [id] => 17137675 [patent_doc_number] => 11139242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Via-to-metal tip connections in multi-layer chips [patent_app_type] => utility [patent_app_number] => 16/397250 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5220 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397250 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397250
Via-to-metal tip connections in multi-layer chips Apr 28, 2019 Issued
Array ( [id] => 14722801 [patent_doc_number] => 20190252464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => SEMICONDUCTOR DEVICE HAVING DATA STORAGE PATTERN [patent_app_type] => utility [patent_app_number] => 16/394494 [patent_app_country] => US [patent_app_date] => 2019-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13708 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16394494 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/394494
SEMICONDUCTOR DEVICE HAVING DATA STORAGE PATTERN Apr 24, 2019 Abandoned
Array ( [id] => 16700181 [patent_doc_number] => 10950793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Display panel having cathode connected to auxiliary electrode through conductive spacers and manufacturing method thereof, and display device [patent_app_type] => utility [patent_app_number] => 16/393153 [patent_app_country] => US [patent_app_date] => 2019-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5386 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16393153 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/393153
Display panel having cathode connected to auxiliary electrode through conductive spacers and manufacturing method thereof, and display device Apr 23, 2019 Issued
Array ( [id] => 16911584 [patent_doc_number] => 11043634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Confining filament at pillar center for memory devices [patent_app_type] => utility [patent_app_number] => 16/378988 [patent_app_country] => US [patent_app_date] => 2019-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 6752 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16378988 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/378988
Confining filament at pillar center for memory devices Apr 8, 2019 Issued
Array ( [id] => 16566833 [patent_doc_number] => 10892209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Semiconductor device with metal die attach to substrate with multi-size cavity [patent_app_type] => utility [patent_app_number] => 16/363468 [patent_app_country] => US [patent_app_date] => 2019-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3102 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16363468 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/363468
Semiconductor device with metal die attach to substrate with multi-size cavity Mar 24, 2019 Issued
Array ( [id] => 16021161 [patent_doc_number] => 20200185424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => METHOD OF FABRICATING ARRAY SUBSTRATE, ARRAY SUBSTRATE, DISPLAY PANEL, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/340137 [patent_app_country] => US [patent_app_date] => 2019-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16340137 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/340137
Array substrate manufacturing using fluorine and hydrogenation processes Mar 21, 2019 Issued
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