Search

Pierre M. Vital

Supervisory Patent Examiner (ID: 2202, Phone: (571)272-4215 , Office: P/2162 )

Most Active Art Unit
2188
Art Unit(s)
2186, 2752, 2188, 2169, 2156, 2162, 2198
Total Applications
390
Issued Applications
296
Pending Applications
16
Abandoned Applications
79

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6736973 [patent_doc_number] => 20030014608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-16 [patent_title] => 'Method of providing stack memory in an operating system with stack memory constraints' [patent_app_type] => new [patent_app_number] => 09/903592 [patent_app_country] => US [patent_app_date] => 2001-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1460 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20030014608.pdf [firstpage_image] =>[orig_patent_app_number] => 09903592 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/903592
Method of providing stack memory in an operating system with stack memory constraints Jul 12, 2001 Abandoned
Array ( [id] => 7608116 [patent_doc_number] => 07000084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'Data access and management system as well as a method for data access and data management for a computer system' [patent_app_type] => utility [patent_app_number] => 09/903431 [patent_app_country] => US [patent_app_date] => 2001-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 13821 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/000/07000084.pdf [firstpage_image] =>[orig_patent_app_number] => 09903431 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/903431
Data access and management system as well as a method for data access and data management for a computer system Jul 9, 2001 Issued
Array ( [id] => 6051449 [patent_doc_number] => 20020169937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => 'Table management technique' [patent_app_type] => new [patent_app_number] => 09/886372 [patent_app_country] => US [patent_app_date] => 2001-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2799 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20020169937.pdf [firstpage_image] =>[orig_patent_app_number] => 09886372 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/886372
Table management technique Jun 21, 2001 Issued
Array ( [id] => 1395673 [patent_doc_number] => 06567906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-20 [patent_title] => 'Secure computing device including virtual memory table look-aside buffer with non-relocatable page of memory' [patent_app_type] => B2 [patent_app_number] => 09/827851 [patent_app_country] => US [patent_app_date] => 2001-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7983 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/567/06567906.pdf [firstpage_image] =>[orig_patent_app_number] => 09827851 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/827851
Secure computing device including virtual memory table look-aside buffer with non-relocatable page of memory Apr 5, 2001 Issued
Array ( [id] => 6483964 [patent_doc_number] => 20020023194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Data reading method and data reading apparatus' [patent_app_type] => new [patent_app_number] => 09/827603 [patent_app_country] => US [patent_app_date] => 2001-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5233 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20020023194.pdf [firstpage_image] =>[orig_patent_app_number] => 09827603 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/827603
Data reading method and data reading apparatus Apr 5, 2001 Issued
Array ( [id] => 6458993 [patent_doc_number] => 20020178210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Mechanism for handling explicit writeback in a cache coherent multi-node architecture' [patent_app_type] => new [patent_app_number] => 09/823791 [patent_app_country] => US [patent_app_date] => 2001-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6175 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20020178210.pdf [firstpage_image] =>[orig_patent_app_number] => 09823791 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/823791
Mechanism for handling explicit writeback in a cache coherent multi-node architecture Mar 30, 2001 Issued
Array ( [id] => 6900392 [patent_doc_number] => 20010010068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-26 [patent_title] => 'State-based allocation and replacement for improved hit ratio in directory caches' [patent_app_type] => new [patent_app_number] => 09/801036 [patent_app_country] => US [patent_app_date] => 2001-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4423 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20010010068.pdf [firstpage_image] =>[orig_patent_app_number] => 09801036 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/801036
State-based allocation and replacement for improved hit ratio in directory caches Mar 6, 2001 Issued
Array ( [id] => 5860929 [patent_doc_number] => 20020123981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'Object-oriented program with a memory accessing function' [patent_app_type] => new [patent_app_number] => 09/796553 [patent_app_country] => US [patent_app_date] => 2001-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8180 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20020123981.pdf [firstpage_image] =>[orig_patent_app_number] => 09796553 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796553
Object-oriented program with a memory accessing function Mar 1, 2001 Issued
Array ( [id] => 6035518 [patent_doc_number] => 20020019909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-14 [patent_title] => 'Method and apparatus for managing virtual storage devices in a storage system' [patent_app_type] => new [patent_app_number] => 09/774299 [patent_app_country] => US [patent_app_date] => 2001-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7067 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20020019909.pdf [firstpage_image] =>[orig_patent_app_number] => 09774299 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/774299
Method and apparatus for managing virtual storage devices in a storage system Jan 29, 2001 Abandoned
Array ( [id] => 6134021 [patent_doc_number] => 20020078317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'First-in, first-out (FIFO) memory with moving boundary' [patent_app_type] => new [patent_app_number] => 09/739265 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20020078317.pdf [firstpage_image] =>[orig_patent_app_number] => 09739265 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/739265
First-in, first-out (FIFO) memory with moving boundary Dec 18, 2000 Abandoned
Array ( [id] => 1429821 [patent_doc_number] => 06510498 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Method and apparatus for memory allocation in a multi-threaded virtual machine' [patent_app_type] => B1 [patent_app_number] => 09/724737 [patent_app_country] => US [patent_app_date] => 2000-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 15147 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510498.pdf [firstpage_image] =>[orig_patent_app_number] => 09724737 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/724737
Method and apparatus for memory allocation in a multi-threaded virtual machine Nov 27, 2000 Issued
Array ( [id] => 1206877 [patent_doc_number] => 06721854 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-13 [patent_title] => 'Controller device, disk controller, auxiliary storage, computer device, and method for controlling auxiliary storage' [patent_app_type] => B1 [patent_app_number] => 09/698344 [patent_app_country] => US [patent_app_date] => 2000-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 7675 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/721/06721854.pdf [firstpage_image] =>[orig_patent_app_number] => 09698344 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/698344
Controller device, disk controller, auxiliary storage, computer device, and method for controlling auxiliary storage Oct 26, 2000 Issued
09/692304 Dynamic queuing structure for a memory controller Oct 18, 2000 Abandoned
Array ( [id] => 1186368 [patent_doc_number] => 06742098 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-25 [patent_title] => 'Dual-port buffer-to-memory interface' [patent_app_type] => B1 [patent_app_number] => 09/678751 [patent_app_country] => US [patent_app_date] => 2000-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5707 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/742/06742098.pdf [firstpage_image] =>[orig_patent_app_number] => 09678751 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/678751
Dual-port buffer-to-memory interface Oct 2, 2000 Issued
Array ( [id] => 7645909 [patent_doc_number] => 06477614 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Method for implementing multiple memory buses on a memory module' [patent_app_type] => B1 [patent_app_number] => 09/658293 [patent_app_country] => US [patent_app_date] => 2000-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5830 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 10 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/477/06477614.pdf [firstpage_image] =>[orig_patent_app_number] => 09658293 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/658293
Method for implementing multiple memory buses on a memory module Sep 7, 2000 Issued
Array ( [id] => 1124872 [patent_doc_number] => 06799249 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-28 [patent_title] => 'Split control for IP read and write cache misses' [patent_app_type] => B1 [patent_app_number] => 09/651598 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2530 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/799/06799249.pdf [firstpage_image] =>[orig_patent_app_number] => 09651598 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/651598
Split control for IP read and write cache misses Aug 29, 2000 Issued
Array ( [id] => 984616 [patent_doc_number] => 06928517 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-09 [patent_title] => 'Method for avoiding delays during snoop requests' [patent_app_type] => utility [patent_app_number] => 09/651597 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2989 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/928/06928517.pdf [firstpage_image] =>[orig_patent_app_number] => 09651597 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/651597
Method for avoiding delays during snoop requests Aug 29, 2000 Issued
Array ( [id] => 1236280 [patent_doc_number] => 06694413 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-17 [patent_title] => 'Computer system and snapshot data management method thereof' [patent_app_type] => B1 [patent_app_number] => 09/652283 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 10498 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/694/06694413.pdf [firstpage_image] =>[orig_patent_app_number] => 09652283 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/652283
Computer system and snapshot data management method thereof Aug 29, 2000 Issued
Array ( [id] => 705059 [patent_doc_number] => 07069391 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-27 [patent_title] => 'Method for improved first level cache coherency' [patent_app_type] => utility [patent_app_number] => 09/650800 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3062 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/069/07069391.pdf [firstpage_image] =>[orig_patent_app_number] => 09650800 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/650800
Method for improved first level cache coherency Aug 29, 2000 Issued
Array ( [id] => 1058968 [patent_doc_number] => 06857049 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-15 [patent_title] => 'Method for managing flushes with the cache' [patent_app_type] => utility [patent_app_number] => 09/651488 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3091 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/857/06857049.pdf [firstpage_image] =>[orig_patent_app_number] => 09651488 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/651488
Method for managing flushes with the cache Aug 29, 2000 Issued
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