Search

Pierre M. Vital

Supervisory Patent Examiner (ID: 2202, Phone: (571)272-4215 , Office: P/2162 )

Most Active Art Unit
2188
Art Unit(s)
2186, 2752, 2188, 2169, 2156, 2162, 2198
Total Applications
390
Issued Applications
296
Pending Applications
16
Abandoned Applications
79

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4350815 [patent_doc_number] => 06334174 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Dynamically-tunable memory controller' [patent_app_type] => 1 [patent_app_number] => 9/247501 [patent_app_country] => US [patent_app_date] => 1999-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 14653 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/334/06334174.pdf [firstpage_image] =>[orig_patent_app_number] => 247501 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/247501
Dynamically-tunable memory controller Feb 9, 1999 Issued
Array ( [id] => 5937835 [patent_doc_number] => 20020062432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-23 [patent_title] => 'METHOD FOR CONTROLLING MEMORY ACCESS ON A MACHINE WITH NON-UNIFORM MEMORY ACCESS AND MACHINE FOR IMPLEMENTING SUCH A METHOD' [patent_app_type] => new [patent_app_number] => 09/243119 [patent_app_country] => US [patent_app_date] => 1999-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6312 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20020062432.pdf [firstpage_image] =>[orig_patent_app_number] => 09243119 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/243119
Method for controlling memory access on a machine with non-uniform memory access and machine for implementing such a method Feb 2, 1999 Issued
Array ( [id] => 1540543 [patent_doc_number] => 06490652 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'Method and apparatus for decoupled retrieval of cache miss data' [patent_app_type] => B1 [patent_app_number] => 09/244692 [patent_app_country] => US [patent_app_date] => 1999-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 32 [patent_no_of_words] => 14942 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/490/06490652.pdf [firstpage_image] =>[orig_patent_app_number] => 09244692 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/244692
Method and apparatus for decoupled retrieval of cache miss data Feb 2, 1999 Issued
Array ( [id] => 5830454 [patent_doc_number] => 20020069321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'CIRCUIT AND METHOD FOR MONITORING SECTOR TRANSFERS TO AND FROM STORAGE MEDIUM' [patent_app_type] => new [patent_app_number] => 09/243295 [patent_app_country] => US [patent_app_date] => 1999-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3796 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20020069321.pdf [firstpage_image] =>[orig_patent_app_number] => 09243295 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/243295
Circuit and method for monitoring sector transfers to and from storage medium Feb 1, 1999 Issued
Array ( [id] => 7638613 [patent_doc_number] => 06397308 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Apparatus and method for differential backup and restoration of data in a computer storage system' [patent_app_type] => B1 [patent_app_number] => 09/224897 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 37 [patent_no_of_words] => 25111 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/397/06397308.pdf [firstpage_image] =>[orig_patent_app_number] => 09224897 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224897
Apparatus and method for differential backup and restoration of data in a computer storage system Dec 30, 1998 Issued
Array ( [id] => 1444079 [patent_doc_number] => 06496902 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Vector and scalar data cache for a vector multiprocessor' [patent_app_type] => B1 [patent_app_number] => 09/223853 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11284 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496902.pdf [firstpage_image] =>[orig_patent_app_number] => 09223853 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223853
Vector and scalar data cache for a vector multiprocessor Dec 30, 1998 Issued
09/223897 APPARATUS AND METHODS FOR COPYING, BACKING UP AND RESTORING LOGICAL OBJECTS IN A COMPUTER STORAGE SYSTEM BY TRANSFERRING BLOCKS OUT OF ORDER OR IN PARALLEL Dec 30, 1998 Abandoned
Array ( [id] => 1602021 [patent_doc_number] => 06385706 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Apparatus and methods for copying a logical object to a primary storage device using a map of storage locations' [patent_app_type] => B1 [patent_app_number] => 09/223896 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 37 [patent_no_of_words] => 25120 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/385/06385706.pdf [firstpage_image] =>[orig_patent_app_number] => 09223896 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223896
Apparatus and methods for copying a logical object to a primary storage device using a map of storage locations Dec 30, 1998 Issued
Array ( [id] => 662872 [patent_doc_number] => 07107395 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-09-12 [patent_title] => 'Apparatus and methods for operating a computer storage system' [patent_app_type] => utility [patent_app_number] => 09/224637 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 37 [patent_no_of_words] => 25140 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/107/07107395.pdf [firstpage_image] =>[orig_patent_app_number] => 09224637 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224637
Apparatus and methods for operating a computer storage system Dec 30, 1998 Issued
Array ( [id] => 1070973 [patent_doc_number] => 06845436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-18 [patent_title] => 'Synchronized signal transfer system' [patent_app_type] => utility [patent_app_number] => 09/213924 [patent_app_country] => US [patent_app_date] => 1998-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 5872 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/845/06845436.pdf [firstpage_image] =>[orig_patent_app_number] => 09213924 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/213924
Synchronized signal transfer system Dec 16, 1998 Issued
Array ( [id] => 4337067 [patent_doc_number] => 06249842 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Apparatus and method for processing data in a RAID system' [patent_app_type] => 1 [patent_app_number] => 9/215505 [patent_app_country] => US [patent_app_date] => 1998-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6068 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249842.pdf [firstpage_image] =>[orig_patent_app_number] => 215505 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/215505
Apparatus and method for processing data in a RAID system Dec 16, 1998 Issued
Array ( [id] => 4317914 [patent_doc_number] => 06182196 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Method and apparatus for arbitrating access requests to a memory' [patent_app_type] => 1 [patent_app_number] => 9/186037 [patent_app_country] => US [patent_app_date] => 1998-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7501 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/182/06182196.pdf [firstpage_image] =>[orig_patent_app_number] => 186037 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/186037
Method and apparatus for arbitrating access requests to a memory Nov 3, 1998 Issued
Array ( [id] => 1567470 [patent_doc_number] => 06363467 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Apparatus and method for allocating memory space for program use and management purposes' [patent_app_type] => B1 [patent_app_number] => 09/171914 [patent_app_country] => US [patent_app_date] => 1998-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 6632 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363467.pdf [firstpage_image] =>[orig_patent_app_number] => 09171914 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/171914
Apparatus and method for allocating memory space for program use and management purposes Oct 28, 1998 Issued
Array ( [id] => 6935463 [patent_doc_number] => 20010056526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-27 [patent_title] => 'MEMORY INTERFACE DEVICE AND MEMORY ADDRESS GENERATION DEVICE' [patent_app_type] => new [patent_app_number] => 09/165785 [patent_app_country] => US [patent_app_date] => 1998-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 22840 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20010056526.pdf [firstpage_image] =>[orig_patent_app_number] => 09165785 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/165785
Memory interface device and memory address generation device Oct 1, 1998 Issued
Array ( [id] => 1567440 [patent_doc_number] => 06438670 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Memory controller with programmable delay counter for tuning performance based on timing parameter of controlled memory storage device' [patent_app_type] => B1 [patent_app_number] => 09/166004 [patent_app_country] => US [patent_app_date] => 1998-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 7840 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/438/06438670.pdf [firstpage_image] =>[orig_patent_app_number] => 09166004 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/166004
Memory controller with programmable delay counter for tuning performance based on timing parameter of controlled memory storage device Oct 1, 1998 Issued
Array ( [id] => 1444096 [patent_doc_number] => 06496911 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Apparatus for memory bus tuning and methods therefor' [patent_app_type] => B1 [patent_app_number] => 09/165954 [patent_app_country] => US [patent_app_date] => 1998-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2956 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496911.pdf [firstpage_image] =>[orig_patent_app_number] => 09165954 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/165954
Apparatus for memory bus tuning and methods therefor Oct 1, 1998 Issued
Array ( [id] => 933320 [patent_doc_number] => 06981096 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-27 [patent_title] => 'Mapping and logic for combining L1 and L2 directories and/or arrays' [patent_app_type] => utility [patent_app_number] => 09/165490 [patent_app_country] => US [patent_app_date] => 1998-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 13638 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/981/06981096.pdf [firstpage_image] =>[orig_patent_app_number] => 09165490 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/165490
Mapping and logic for combining L1 and L2 directories and/or arrays Oct 1, 1998 Issued
Array ( [id] => 1406859 [patent_doc_number] => 06560688 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'System and method for improving accelerated graphics port systems' [patent_app_type] => B1 [patent_app_number] => 09/164799 [patent_app_country] => US [patent_app_date] => 1998-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9267 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/560/06560688.pdf [firstpage_image] =>[orig_patent_app_number] => 09164799 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/164799
System and method for improving accelerated graphics port systems Sep 30, 1998 Issued
Array ( [id] => 731046 [patent_doc_number] => 07047357 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-16 [patent_title] => 'Virtualized striping controller' [patent_app_type] => utility [patent_app_number] => 09/164898 [patent_app_country] => US [patent_app_date] => 1998-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3322 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/047/07047357.pdf [firstpage_image] =>[orig_patent_app_number] => 09164898 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/164898
Virtualized striping controller Sep 30, 1998 Issued
Array ( [id] => 4400347 [patent_doc_number] => 06304951 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Data processing system and method for generating virtual memory descriptors including pretranslated physical addresses' [patent_app_type] => 1 [patent_app_number] => 9/165174 [patent_app_country] => US [patent_app_date] => 1998-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3761 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304951.pdf [firstpage_image] =>[orig_patent_app_number] => 165174 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/165174
Data processing system and method for generating virtual memory descriptors including pretranslated physical addresses Sep 30, 1998 Issued
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