Pierre Miche Bataille

Array ( [id] => 20323276 [patent_doc_number] => 20250335364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => MEMORY ACCESS DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 19/260222 [patent_app_country] => US [patent_app_date] => 2025-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19260222 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20043280 [patent_doc_number] => 20250181502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => MEMORY SYSTEM AND A METHOD FOR GARBAGE COLLECTION OF THE MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 19/049483 [patent_app_country] => US [patent_app_date] => 2025-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19049483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20152043 [patent_doc_number] => 20250251881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => TAG WITH VIRTUAL MEMORY [patent_app_type] => utility [patent_app_number] => 19/042360 [patent_app_country] => US [patent_app_date] => 2025-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19042360 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20087360 [patent_doc_number] => 20250217296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => CACHE FOR IDENTIFIERS REPRESENTING MERGED ACCESS CONTROL INFORMATION [patent_app_type] => utility [patent_app_number] => 19/006604 [patent_app_country] => US [patent_app_date] => 2024-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19006604 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19864420 [patent_doc_number] => 20250103206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => BIT ERROR MANAGEMENT IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/973439 [patent_app_country] => US [patent_app_date] => 2024-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12522 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18973439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20166624 [patent_doc_number] => 20250258671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => SYSTEMS AND METHODS FOR CACHE MANAGEMENT OF TIERED STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 18/953058 [patent_app_country] => US [patent_app_date] => 2024-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16504 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18953058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20009456 [patent_doc_number] => 20250147678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => DRAM AND CONTROL METHOD FOR THE SAME [patent_app_type] => utility [patent_app_number] => 18/935375 [patent_app_country] => US [patent_app_date] => 2024-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18935375 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19771899 [patent_doc_number] => 20250053325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => CLONE VOLUME SPLIT OF CLONE VOLUME FROM PARENT VOLUME WITH DATA TIERED TO OBJECT STORE [patent_app_type] => utility [patent_app_number] => 18/928337 [patent_app_country] => US [patent_app_date] => 2024-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18928337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20000773 [patent_doc_number] => 20250138995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => OPTIMIZING DATA TRANSFERS BETWEEN A PARALLEL PROCESSING PROCESSOR AND A MEMORY [patent_app_type] => utility [patent_app_number] => 18/911459 [patent_app_country] => US [patent_app_date] => 2024-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 391 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18911459 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20365983 [patent_doc_number] => 20250355795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => MEMORY CONTROL CIRCUIT AND MEMORY CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/912072 [patent_app_country] => US [patent_app_date] => 2024-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18912072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20290130 [patent_doc_number] => 20250315373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => METHOD, DEVICE, AND COMPUTER PROGRAM PRODUCT FOR PERFORMING FILE SYSTEM CHECK [patent_app_type] => utility [patent_app_number] => 18/911509 [patent_app_country] => US [patent_app_date] => 2024-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 931 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18911509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19725891 [patent_doc_number] => 20250028642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => COHERENT MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/905936 [patent_app_country] => US [patent_app_date] => 2024-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18905936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20296634 [patent_doc_number] => 20250321877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => MEMORY DEVICE FOR PERFORMING IN-MEMORY PROCESSING AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/904765 [patent_app_country] => US [patent_app_date] => 2024-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2467 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18904765 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19711354 [patent_doc_number] => 20250021496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => MEMORY ACCESS METHOD AND RELATED DEVICE [patent_app_type] => utility [patent_app_number] => 18/900835 [patent_app_country] => US [patent_app_date] => 2024-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18900835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19661788 [patent_doc_number] => 20240428853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => Caching Techniques for Deep Learning Accelerator [patent_app_type] => utility [patent_app_number] => 18/825829 [patent_app_country] => US [patent_app_date] => 2024-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11925 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18825829 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19645062 [patent_doc_number] => 20240419582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => CACHE BASED MEMORY ACCESS TRACKING [patent_app_type] => utility [patent_app_number] => 18/814197 [patent_app_country] => US [patent_app_date] => 2024-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18814197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19633009 [patent_doc_number] => 20240411458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => MEMORY DEVICE, MEMORY SYSTEM, AND PROGRAM OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/808590 [patent_app_country] => US [patent_app_date] => 2024-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18808590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19787383 [patent_doc_number] => 20250061062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => TECHNIQUES FOR STORING DATA AND TAGS IN DIFFERENT MEMORY ARRAYS [patent_app_type] => utility [patent_app_number] => 18/806549 [patent_app_country] => US [patent_app_date] => 2024-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18806549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19819220 [patent_doc_number] => 20250077427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => ELECTRONIC DEVICE, MEMORY DEVICE, AND OPERATING METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/802266 [patent_app_country] => US [patent_app_date] => 2024-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11027 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18802266 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19802414 [patent_doc_number] => 20250068339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 18/797877 [patent_app_country] => US [patent_app_date] => 2024-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18797877 [rel_patent_id] =>[rel_patent_doc_number] =>)