Pierre Miche Bataille

Array ( [id] => 16097915 [patent_doc_number] => 20200202944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => MONOTONIC COUNTERS IN MEMORIES [patent_app_type] => utility [patent_app_number] => 16/229609 [patent_app_country] => US [patent_app_date] => 2018-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8169 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16229609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14218343 [patent_doc_number] => 20190121556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => ANTI-HACKING MECHANISMS FOR FLASH MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/228313 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16228313 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16535073 [patent_doc_number] => 10877673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Transparently attached flash memory security [patent_app_type] => utility [patent_app_number] => 16/218773 [patent_app_country] => US [patent_app_date] => 2018-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 12131 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16218773 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14188799 [patent_doc_number] => 20190114105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => MEMORY SYSTEM AND SOC INCLUDING LINEAR ADDRESS REMAPPING LOGIC [patent_app_type] => utility [patent_app_number] => 16/215827 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7502 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -36 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14443323 [patent_doc_number] => 20190179534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => DEVICES AND METHODS FOR DATA PROPAGATION IN A DISTRIBUTED NETWORK [patent_app_type] => utility [patent_app_number] => 16/214062 [patent_app_country] => US [patent_app_date] => 2018-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16214062 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14162069 [patent_doc_number] => 20190108137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => METHOD AND APPARATUS FOR JOURNAL AWARE CACHE MANAGEMENT [patent_app_type] => utility [patent_app_number] => 16/211157 [patent_app_country] => US [patent_app_date] => 2018-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16211157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15998117 [patent_doc_number] => 20200174929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => System, Apparatus And Method For Dynamic Automatic Sub-Cacheline Granularity Memory Access Control [patent_app_type] => utility [patent_app_number] => 16/203891 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16592396 [patent_doc_number] => 10901657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Dynamic write credit buffer management of non-volatile dual inline memory module [patent_app_type] => utility [patent_app_number] => 16/203775 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5240 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203775 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16592395 [patent_doc_number] => 10901656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Memory system with soft-read suspend scheme and method of operating such memory system [patent_app_type] => utility [patent_app_number] => 16/194165 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6344 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16894867 [patent_doc_number] => 11036417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Methods and systems for object level de-duplication for solid state devices [patent_app_type] => utility [patent_app_number] => 16/191210 [patent_app_country] => US [patent_app_date] => 2018-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5095 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191210 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14047511 [patent_doc_number] => 20190079862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => LOGICALLY EXPANDING EXISTING MEMORIES IN A DISPERSED STORAGE NETWORK [patent_app_type] => utility [patent_app_number] => 16/188942 [patent_app_country] => US [patent_app_date] => 2018-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16188942 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15902755 [patent_doc_number] => 20200150897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => CLOUD EDITION AND RETRIEVE [patent_app_type] => utility [patent_app_number] => 16/186934 [patent_app_country] => US [patent_app_date] => 2018-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18700 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186934 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14413389 [patent_doc_number] => 20190172538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => HYBRID MEMORY ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 16/172104 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14218703 [patent_doc_number] => 20190121736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => TEMPORARILY STORING MEMORY CONTENTS [patent_app_type] => utility [patent_app_number] => 16/167985 [patent_app_country] => US [patent_app_date] => 2018-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16167985 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16046107 [patent_doc_number] => 10684926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Online iterative data verification for synchronous replication [patent_app_type] => utility [patent_app_number] => 16/167858 [patent_app_country] => US [patent_app_date] => 2018-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9709 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16167858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14966637 [patent_doc_number] => 20190310797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => CONTROLLER AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/168427 [patent_app_country] => US [patent_app_date] => 2018-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16168427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16834054 [patent_doc_number] => 11010306 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Apparatus and method for managing a cache hierarchy [patent_app_type] => utility [patent_app_number] => 16/166422 [patent_app_country] => US [patent_app_date] => 2018-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6965 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16166422 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13875137 [patent_doc_number] => 20190033909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => MEMORY SYSTEM WITH MULTIPLE CHANNEL INTERFACES AND METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 16/149987 [patent_app_country] => US [patent_app_date] => 2018-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10032 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16149987 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16292118 [patent_doc_number] => 10768968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => Split-control of page attributes between virtual machines and a virtual machine monitor [patent_app_type] => utility [patent_app_number] => 16/147169 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 18349 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147169 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16370979 [patent_doc_number] => 10802734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Method for fast boot read [patent_app_type] => utility [patent_app_number] => 16/147161 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7890 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147161 [rel_patent_id] =>[rel_patent_doc_number] =>)