
Pierre Miche Bataille
Examiner (ID: 12446, Phone: (571)272-4178 , Office: P/2136 )
| Most Active Art Unit | 2136 |
| Art Unit(s) | 2752, 2138, 2186, 2136 |
| Total Applications | 2005 |
| Issued Applications | 1776 |
| Pending Applications | 116 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20166624
[patent_doc_number] => 20250258671
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-14
[patent_title] => SYSTEMS AND METHODS FOR CACHE MANAGEMENT OF TIERED STORAGE DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/953058
[patent_app_country] => US
[patent_app_date] => 2024-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16504
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18953058
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/953058 | SYSTEMS AND METHODS FOR CACHE MANAGEMENT OF TIERED STORAGE DEVICES | Nov 18, 2024 | Pending |
Array
(
[id] => 20009456
[patent_doc_number] => 20250147678
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-08
[patent_title] => DRAM AND CONTROL METHOD FOR THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/935375
[patent_app_country] => US
[patent_app_date] => 2024-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18935375
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/935375 | DRAM AND CONTROL METHOD FOR THE SAME | Oct 31, 2024 | Pending |
Array
(
[id] => 20680239
[patent_doc_number] => 20260119056
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-04-30
[patent_title] => ACTIVITY-BASED DATA RANDOM ACCESS MEMORY (RAM) RETENTION
[patent_app_type] => utility
[patent_app_number] => 18/933835
[patent_app_country] => US
[patent_app_date] => 2024-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2451
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18933835
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/933835 | ACTIVITY-BASED DATA RANDOM ACCESS MEMORY (RAM) RETENTION | Oct 30, 2024 | Pending |
Array
(
[id] => 19771899
[patent_doc_number] => 20250053325
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-13
[patent_title] => CLONE VOLUME SPLIT OF CLONE VOLUME FROM PARENT VOLUME WITH DATA TIERED TO OBJECT STORE
[patent_app_type] => utility
[patent_app_number] => 18/928337
[patent_app_country] => US
[patent_app_date] => 2024-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6776
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18928337
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/928337 | CLONE VOLUME SPLIT OF CLONE VOLUME FROM PARENT VOLUME WITH DATA TIERED TO OBJECT STORE | Oct 27, 2024 | Pending |
Array
(
[id] => 20000773
[patent_doc_number] => 20250138995
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-01
[patent_title] => OPTIMIZING DATA TRANSFERS BETWEEN A PARALLEL PROCESSING PROCESSOR AND A MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/911459
[patent_app_country] => US
[patent_app_date] => 2024-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4477
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 391
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18911459
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/911459 | OPTIMIZING DATA TRANSFERS BETWEEN A PARALLEL PROCESSING PROCESSOR AND A MEMORY | Oct 9, 2024 | Pending |
Array
(
[id] => 20365983
[patent_doc_number] => 20250355795
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-20
[patent_title] => MEMORY CONTROL CIRCUIT AND MEMORY CONTROL METHOD
[patent_app_type] => utility
[patent_app_number] => 18/912072
[patent_app_country] => US
[patent_app_date] => 2024-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18912072
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/912072 | Memory control circuit and memory control method | Oct 9, 2024 | Issued |
Array
(
[id] => 20290130
[patent_doc_number] => 20250315373
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-09
[patent_title] => METHOD, DEVICE, AND COMPUTER PROGRAM PRODUCT FOR PERFORMING FILE SYSTEM CHECK
[patent_app_type] => utility
[patent_app_number] => 18/911509
[patent_app_country] => US
[patent_app_date] => 2024-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 931
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18911509
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/911509 | Method, device, and computer program product for performing file system check | Oct 9, 2024 | Issued |
Array
(
[id] => 20805199
[patent_doc_number] => 12670106
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-06-30
[patent_title] => System and method of exclusive memory access among multiple processing devices
[patent_app_type] => utility
[patent_app_number] => 18/908345
[patent_app_country] => US
[patent_app_date] => 2024-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 2613
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18908345
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/908345 | System and method of exclusive memory access among multiple processing devices | Oct 6, 2024 | Issued |
Array
(
[id] => 19725891
[patent_doc_number] => 20250028642
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-23
[patent_title] => COHERENT MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/905936
[patent_app_country] => US
[patent_app_date] => 2024-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7349
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18905936
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/905936 | COHERENT MEMORY SYSTEM | Oct 2, 2024 | Pending |
Array
(
[id] => 20897903
[patent_doc_number] => 12705169
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-08-11
[patent_title] => Memory device for performing in-memory processing and operating method thereof
[patent_app_type] => utility
[patent_app_number] => 18/904765
[patent_app_country] => US
[patent_app_date] => 2024-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 2411
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18904765
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/904765 | MEMORY DEVICE FOR PERFORMING IN-MEMORY PROCESSING AND OPERATING METHOD THEREOF | Oct 1, 2024 | Pending |
Array
(
[id] => 19711354
[patent_doc_number] => 20250021496
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-16
[patent_title] => MEMORY ACCESS METHOD AND RELATED DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/900835
[patent_app_country] => US
[patent_app_date] => 2024-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 40434
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18900835
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/900835 | MEMORY ACCESS METHOD AND RELATED DEVICE | Sep 28, 2024 | Pending |
Array
(
[id] => 19661788
[patent_doc_number] => 20240428853
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => Caching Techniques for Deep Learning Accelerator
[patent_app_type] => utility
[patent_app_number] => 18/825829
[patent_app_country] => US
[patent_app_date] => 2024-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11925
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18825829
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/825829 | Caching Techniques for Deep Learning Accelerator | Sep 4, 2024 | Pending |
Array
(
[id] => 19645062
[patent_doc_number] => 20240419582
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-19
[patent_title] => CACHE BASED MEMORY ACCESS TRACKING
[patent_app_type] => utility
[patent_app_number] => 18/814197
[patent_app_country] => US
[patent_app_date] => 2024-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10458
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18814197
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/814197 | CACHE BASED MEMORY ACCESS TRACKING | Aug 22, 2024 | Pending |
Array
(
[id] => 20731723
[patent_doc_number] => 12638981
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-05-26
[patent_title] => Memory device, memory system, and program operation method thereof
[patent_app_type] => utility
[patent_app_number] => 18/808590
[patent_app_country] => US
[patent_app_date] => 2024-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 17
[patent_no_of_words] => 8620
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18808590
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/808590 | Memory device, memory system, and program operation method thereof | Aug 18, 2024 | Issued |
Array
(
[id] => 20673294
[patent_doc_number] => 12613806
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-28
[patent_title] => Techniques for storing data and tags in different memory arrays
[patent_app_type] => utility
[patent_app_number] => 18/806549
[patent_app_country] => US
[patent_app_date] => 2024-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 30
[patent_no_of_words] => 17783
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18806549
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/806549 | Techniques for storing data and tags in different memory arrays | Aug 14, 2024 | Issued |
Array
(
[id] => 19819220
[patent_doc_number] => 20250077427
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-06
[patent_title] => ELECTRONIC DEVICE, MEMORY DEVICE, AND OPERATING METHOD OF MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/802266
[patent_app_country] => US
[patent_app_date] => 2024-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11027
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18802266
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/802266 | ELECTRONIC DEVICE, MEMORY DEVICE, AND OPERATING METHOD OF MEMORY DEVICE | Aug 12, 2024 | Pending |
Array
(
[id] => 20850939
[patent_doc_number] => 12687971
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-07-21
[patent_title] => Integrated circuit device
[patent_app_type] => utility
[patent_app_number] => 18/797877
[patent_app_country] => US
[patent_app_date] => 2024-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 0
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18797877
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/797877 | INTEGRATED CIRCUIT DEVICE | Aug 7, 2024 | Issued |
Array
(
[id] => 19603099
[patent_doc_number] => 20240393979
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-28
[patent_title] => ACTIVATE INFORMATION ON PRECEDING COMMAND
[patent_app_type] => utility
[patent_app_number] => 18/792843
[patent_app_country] => US
[patent_app_date] => 2024-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10804
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18792843
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/792843 | Activate information on preceding command | Aug 1, 2024 | Issued |
Array
(
[id] => 19588203
[patent_doc_number] => 20240385760
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-21
[patent_title] => MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/788695
[patent_app_country] => US
[patent_app_date] => 2024-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 25707
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18788695
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/788695 | Memory storage with selected performance mode | Jul 29, 2024 | Issued |
Array
(
[id] => 20758155
[patent_doc_number] => 12650926
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-06-09
[patent_title] => Caching techniques using a mapping cache and maintaining cache coherency using physical to logical address mapping
[patent_app_type] => utility
[patent_app_number] => 18/781185
[patent_app_country] => US
[patent_app_date] => 2024-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 28128
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18781185
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/781185 | Caching techniques using a mapping cache and maintaining cache coherency using physical to logical address mapping | Jul 22, 2024 | Issued |