Search

Pierre Miche Bataille

Examiner (ID: 12446, Phone: (571)272-4178 , Office: P/2136 )

Most Active Art Unit
2136
Art Unit(s)
2752, 2138, 2186, 2136
Total Applications
2005
Issued Applications
1776
Pending Applications
116
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20520172 [patent_doc_number] => 20260044278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-12 [patent_title] => BALANCING PEC IN MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 19/100418 [patent_app_country] => US [patent_app_date] => 2022-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7524 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19100418 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/100418
BALANCING PEC IN MEMORY SYSTEMS Aug 1, 2022 Pending
Array ( [id] => 18519881 [patent_doc_number] => 11709772 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-07-25 [patent_title] => Storage system with multiplane segments and cooperative flash management [patent_app_type] => utility [patent_app_number] => 17/877881 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 37 [patent_no_of_words] => 37309 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877881 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877881
Storage system with multiplane segments and cooperative flash management Jul 28, 2022 Issued
Array ( [id] => 19107613 [patent_doc_number] => 11960722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Memory device programming technique for increased bits per cell [patent_app_type] => utility [patent_app_number] => 17/872217 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 17560 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872217 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872217
Memory device programming technique for increased bits per cell Jul 24, 2022 Issued
Array ( [id] => 19872616 [patent_doc_number] => 12265476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => System, method, apparatus, and computer program product for providing a cache mechanism [patent_app_type] => utility [patent_app_number] => 17/813723 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9708 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813723 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/813723
System, method, apparatus, and computer program product for providing a cache mechanism Jul 19, 2022 Issued
Array ( [id] => 19277065 [patent_doc_number] => 12027196 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Memory system, control method, and power control circuit [patent_app_type] => utility [patent_app_number] => 17/856909 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8658 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856909 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856909
Memory system, control method, and power control circuit Jun 30, 2022 Issued
Array ( [id] => 19259485 [patent_doc_number] => 12019539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Adaptive configuration of memory devices using host profiling [patent_app_type] => utility [patent_app_number] => 17/856433 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5889 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856433 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856433
Adaptive configuration of memory devices using host profiling Jun 30, 2022 Issued
Array ( [id] => 19152871 [patent_doc_number] => 11977782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Approach for enabling concurrent execution of host memory commands and near-memory processing commands [patent_app_type] => utility [patent_app_number] => 17/855442 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855442 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855442
Approach for enabling concurrent execution of host memory commands and near-memory processing commands Jun 29, 2022 Issued
Array ( [id] => 18864329 [patent_doc_number] => 20230418765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => CACHE REPLACEMENT CONTROL [patent_app_type] => utility [patent_app_number] => 17/850072 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15411 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850072 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/850072
Cache replacement control Jun 26, 2022 Issued
Array ( [id] => 18864041 [patent_doc_number] => 20230418477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => SECURITY INDICATOR ON A DATA STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/849703 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17898 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849703 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849703
Security indicator on a data storage device Jun 26, 2022 Issued
Array ( [id] => 18471403 [patent_doc_number] => 20230205689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => DATA STORAGE DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/849194 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849194
Data storage device and method of operating the same Jun 23, 2022 Issued
Array ( [id] => 20359054 [patent_doc_number] => 12475050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Cache-coherent interconnect based near-data-processing accelerator [patent_app_type] => utility [patent_app_number] => 17/834896 [patent_app_country] => US [patent_app_date] => 2022-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5579 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17834896 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/834896
Cache-coherent interconnect based near-data-processing accelerator Jun 6, 2022 Issued
Array ( [id] => 17884949 [patent_doc_number] => 20220300426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => FLASH-INTEGRATED HIGH BANDWIDTH MEMORY APPLIANCE [patent_app_type] => utility [patent_app_number] => 17/833219 [patent_app_country] => US [patent_app_date] => 2022-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5029 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833219 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/833219
Flash-integrated high bandwidth memory appliance Jun 5, 2022 Issued
Array ( [id] => 20331399 [patent_doc_number] => 12461674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Many-core definable distributed shared storage structure [patent_app_type] => utility [patent_app_number] => 18/715367 [patent_app_country] => US [patent_app_date] => 2022-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 4582 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 471 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18715367 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/715367
Many-core definable distributed shared storage structure May 9, 2022 Issued
Array ( [id] => 17832141 [patent_doc_number] => 20220269445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => RESTORING AN ARCHIVE AUTHORIZED BY AN AUTHENTICATED USER [patent_app_type] => utility [patent_app_number] => 17/739515 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17739515 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/739515
Restoring an archive authorized by an authenticated user May 8, 2022 Issued
Array ( [id] => 19092886 [patent_doc_number] => 11954341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => External storage of internal drive management data [patent_app_type] => utility [patent_app_number] => 17/737719 [patent_app_country] => US [patent_app_date] => 2022-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4465 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737719 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/737719
External storage of internal drive management data May 4, 2022 Issued
Array ( [id] => 17809331 [patent_doc_number] => 20220261166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/735858 [patent_app_country] => US [patent_app_date] => 2022-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17735858 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/735858
Storage device configuration and method managing storage configuration May 2, 2022 Issued
Array ( [id] => 17809522 [patent_doc_number] => 20220261357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => DYNAMICALY ADJUSTED CACHE POLICY AND COMPRESSION SCHEME FOR GRAPHS PROCESSED BY GRAPH NEURAL NETWORKS [patent_app_type] => utility [patent_app_number] => 17/734994 [patent_app_country] => US [patent_app_date] => 2022-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12482 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17734994 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/734994
DYNAMICALY ADJUSTED CACHE POLICY AND COMPRESSION SCHEME FOR GRAPHS PROCESSED BY GRAPH NEURAL NETWORKS May 1, 2022 Issued
Array ( [id] => 19369464 [patent_doc_number] => 12061545 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-08-13 [patent_title] => Memory page manager [patent_app_type] => utility [patent_app_number] => 17/660094 [patent_app_country] => US [patent_app_date] => 2022-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 12809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17660094 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/660094
Memory page manager Apr 20, 2022 Issued
Array ( [id] => 19235897 [patent_doc_number] => 20240193092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => PROCESSOR SUPPORT FOR USING CACHE WAY-LOCKING TO SIMULTANEOUSLY RECORD PLURAL EXECUTION CONTEXTS INTO INDEPENDENT EXECUTION TRACES [patent_app_type] => utility [patent_app_number] => 18/553818 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18553818 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/553818
Processor support for using cache way-locking to simultaneously record plural execution contexts into independent execution traces Apr 17, 2022 Issued
Array ( [id] => 18711140 [patent_doc_number] => 20230333769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => SHARED MEMORY PROTECTION METHOD FOR SECURING MMIO COMMANDS [patent_app_type] => utility [patent_app_number] => 17/722817 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17722817 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/722817
Shared memory protection method for securing MMIO commands Apr 17, 2022 Issued
Menu