
Prasith Thammavong
Examiner (ID: 9450, Phone: (571)270-1040 , Office: P/2137 )
| Most Active Art Unit | 2137 |
| Art Unit(s) | 2187, 2137 |
| Total Applications | 681 |
| Issued Applications | 541 |
| Pending Applications | 67 |
| Abandoned Applications | 86 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18668540
[patent_doc_number] => 11775440
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-03
[patent_title] => Producer prefetch filter
[patent_app_type] => utility
[patent_app_number] => 17/579842
[patent_app_country] => US
[patent_app_date] => 2022-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 13
[patent_no_of_words] => 20720
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579842
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/579842 | Producer prefetch filter | Jan 19, 2022 | Issued |
Array
(
[id] => 18438186
[patent_doc_number] => 20230185481
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => BIOS VARIABLES STORAGE
[patent_app_type] => utility
[patent_app_number] => 17/550050
[patent_app_country] => US
[patent_app_date] => 2021-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5845
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550050
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/550050 | Bios variables storage | Dec 13, 2021 | Issued |
Array
(
[id] => 18167391
[patent_doc_number] => 20230033998
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-02
[patent_title] => MEMORY SYSTEM FOR MAINTAINING DATA CONSISTENCY AND OPERATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/539257
[patent_app_country] => US
[patent_app_date] => 2021-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4692
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17539257
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/539257 | Memory system for maintaining data consistency and operation method thereof | Nov 30, 2021 | Issued |
Array
(
[id] => 17475731
[patent_doc_number] => 20220083235
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-17
[patent_title] => PROGRAMMING FREQUENTLY READ DATA TO LOW LATENCY PORTIONS OF A SOLID-STATE STORAGE ARRAY
[patent_app_type] => utility
[patent_app_number] => 17/535116
[patent_app_country] => US
[patent_app_date] => 2021-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 38705
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17535116
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/535116 | Programming frequently read data to low latency portions of a solid-state storage array | Nov 23, 2021 | Issued |
Array
(
[id] => 17430421
[patent_doc_number] => 20220058130
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-24
[patent_title] => MEMORY SYSTEM, OPERATION METHOD THEREOF, AND DATABASE SYSTEM INCLUDING THE MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/518355
[patent_app_country] => US
[patent_app_date] => 2021-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16594
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17518355
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/518355 | Memory system, operation method thereof, and database system including the memory system | Nov 2, 2021 | Issued |
Array
(
[id] => 18370745
[patent_doc_number] => 11650920
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-05-16
[patent_title] => Write cache management
[patent_app_type] => utility
[patent_app_number] => 17/511695
[patent_app_country] => US
[patent_app_date] => 2021-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 10359
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17511695
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/511695 | Write cache management | Oct 26, 2021 | Issued |
Array
(
[id] => 18982390
[patent_doc_number] => 11907568
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-20
[patent_title] => Storage controller, storage device, and operation method of storage device
[patent_app_type] => utility
[patent_app_number] => 17/501225
[patent_app_country] => US
[patent_app_date] => 2021-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 13904
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501225
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/501225 | Storage controller, storage device, and operation method of storage device | Oct 13, 2021 | Issued |
Array
(
[id] => 17613910
[patent_doc_number] => 20220156190
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-19
[patent_title] => RE-STUBBING MIGRATED DATA
[patent_app_type] => utility
[patent_app_number] => 17/483661
[patent_app_country] => US
[patent_app_date] => 2021-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 41787
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483661
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/483661 | RE-STUBBING MIGRATED DATA | Sep 22, 2021 | Abandoned |
Array
(
[id] => 17338011
[patent_doc_number] => 20220004342
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-06
[patent_title] => SSD WITH MULTIPLE BANDWIDTH TIERS BASED ON PHYSICAL CHARACTERISTICS
[patent_app_type] => utility
[patent_app_number] => 17/481796
[patent_app_country] => US
[patent_app_date] => 2021-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8330
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481796
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/481796 | SSD with multiple bandwidth tiers based on physical characteristics | Sep 21, 2021 | Issued |
Array
(
[id] => 17301519
[patent_doc_number] => 20210397358
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-23
[patent_title] => Data Migration For Write Groups
[patent_app_type] => utility
[patent_app_number] => 17/464141
[patent_app_country] => US
[patent_app_date] => 2021-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 38390
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17464141
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/464141 | Data migration for write groups | Aug 31, 2021 | Issued |
Array
(
[id] => 20242671
[patent_doc_number] => 12422989
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-23
[patent_title] => Memory schemes for infrastructure processing unit architectures
[patent_app_type] => utility
[patent_app_number] => 17/412971
[patent_app_country] => US
[patent_app_date] => 2021-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3404
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17412971
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/412971 | Memory schemes for infrastructure processing unit architectures | Aug 25, 2021 | Issued |
Array
(
[id] => 19029111
[patent_doc_number] => 11928471
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-12
[patent_title] => Metadata predictor
[patent_app_type] => utility
[patent_app_number] => 17/406513
[patent_app_country] => US
[patent_app_date] => 2021-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 31
[patent_no_of_words] => 16956
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406513
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/406513 | Metadata predictor | Aug 18, 2021 | Issued |
Array
(
[id] => 18889486
[patent_doc_number] => 11868256
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-09
[patent_title] => Techniques for metadata updating and retrieval
[patent_app_type] => utility
[patent_app_number] => 17/380610
[patent_app_country] => US
[patent_app_date] => 2021-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 23731
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 276
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380610
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/380610 | Techniques for metadata updating and retrieval | Jul 19, 2021 | Issued |
Array
(
[id] => 18046750
[patent_doc_number] => 11520704
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-12-06
[patent_title] => Writing store data of multiple store operations into a cache line in a single cycle
[patent_app_type] => utility
[patent_app_number] => 17/364495
[patent_app_country] => US
[patent_app_date] => 2021-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4537
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364495
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/364495 | Writing store data of multiple store operations into a cache line in a single cycle | Jun 29, 2021 | Issued |
Array
(
[id] => 17157910
[patent_doc_number] => 20210318961
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-14
[patent_title] => MITIGATING POOLED MEMORY CACHE MISS LATENCY WITH CACHE MISS FAULTS AND TRANSACTION ABORTS
[patent_app_type] => utility
[patent_app_number] => 17/356335
[patent_app_country] => US
[patent_app_date] => 2021-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13298
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356335
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/356335 | MITIGATING POOLED MEMORY CACHE MISS LATENCY WITH CACHE MISS FAULTS AND TRANSACTION ABORTS | Jun 22, 2021 | Abandoned |
Array
(
[id] => 18095670
[patent_doc_number] => 20220414011
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-29
[patent_title] => OPPORTUNISTIC LATE DEPTH TESTING TO PREVENT STALLING FOR OVERLAPPING CACHE LINES
[patent_app_type] => utility
[patent_app_number] => 17/355856
[patent_app_country] => US
[patent_app_date] => 2021-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 45775
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355856
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/355856 | Opportunistic late depth testing to prevent stalling for overlapping cache lines | Jun 22, 2021 | Issued |
Array
(
[id] => 18687060
[patent_doc_number] => 11782797
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-10
[patent_title] => Achieving activity centric computing using portable containers
[patent_app_type] => utility
[patent_app_number] => 17/345611
[patent_app_country] => US
[patent_app_date] => 2021-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 5553
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345611
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/345611 | Achieving activity centric computing using portable containers | Jun 10, 2021 | Issued |
Array
(
[id] => 17542864
[patent_doc_number] => 11307986
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-04-19
[patent_title] => Machine learning based tiered memory systems and methods
[patent_app_type] => utility
[patent_app_number] => 17/344449
[patent_app_country] => US
[patent_app_date] => 2021-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 6997
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 513
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344449
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/344449 | Machine learning based tiered memory systems and methods | Jun 9, 2021 | Issued |
Array
(
[id] => 17172587
[patent_doc_number] => 20210326257
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-21
[patent_title] => WRITE WIDTH ALIGNED STORAGE DEVICE BUFFER FLUSH
[patent_app_type] => utility
[patent_app_number] => 17/306419
[patent_app_country] => US
[patent_app_date] => 2021-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10449
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17306419
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/306419 | Write width aligned storage device buffer flush | May 2, 2021 | Issued |
Array
(
[id] => 17962238
[patent_doc_number] => 20220342819
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-27
[patent_title] => ADVANCED POWER OFF NOTIFICATION FOR MANAGED MEMORY
[patent_app_type] => utility
[patent_app_number] => 17/241850
[patent_app_country] => US
[patent_app_date] => 2021-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19118
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241850
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/241850 | Advanced power off notification for managed memory | Apr 26, 2021 | Issued |