Search

Preeti Kumar

Examiner (ID: 5654, Phone: (571)272-1320 , Office: P/1764 )

Most Active Art Unit
1764
Art Unit(s)
1751, 1796, 1764, 1761
Total Applications
720
Issued Applications
185
Pending Applications
132
Abandoned Applications
418

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18225711 [patent_doc_number] => 20230064705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/459101 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11925 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459101 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/459101
Semiconductor device structure and methods of forming the same Aug 26, 2021 Issued
Array ( [id] => 19168449 [patent_doc_number] => 11984362 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-05-14 [patent_title] => Control of locos structure thickness without a mask [patent_app_type] => utility [patent_app_number] => 17/411761 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411761 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/411761
Control of locos structure thickness without a mask Aug 24, 2021 Issued
Array ( [id] => 17277774 [patent_doc_number] => 20210383972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => INTEGRATION SCHEME FOR BREAKDOWN VOLTAGE ENHANCEMENT OF A PIEZOELECTRIC METAL-INSULATOR-METAL DEVICE [patent_app_type] => utility [patent_app_number] => 17/411416 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6661 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411416 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/411416
Integration scheme for breakdown voltage enhancement of a piezoelectric metal-insulator-metal device Aug 24, 2021 Issued
Array ( [id] => 18735805 [patent_doc_number] => 11804547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Gate structure and method with enhanced gate contact and threshold voltage [patent_app_type] => utility [patent_app_number] => 17/410769 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 37 [patent_no_of_words] => 9669 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410769 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/410769
Gate structure and method with enhanced gate contact and threshold voltage Aug 23, 2021 Issued
Array ( [id] => 18766943 [patent_doc_number] => 11817352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Method of fabricating redistribution circuit structure [patent_app_type] => utility [patent_app_number] => 17/409010 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 53 [patent_no_of_words] => 10958 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409010 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409010
Method of fabricating redistribution circuit structure Aug 22, 2021 Issued
Array ( [id] => 18548375 [patent_doc_number] => 11721737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Quantum dot devices with trenched substrates [patent_app_type] => utility [patent_app_number] => 17/401692 [patent_app_country] => US [patent_app_date] => 2021-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 68 [patent_no_of_words] => 18467 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401692 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/401692
Quantum dot devices with trenched substrates Aug 12, 2021 Issued
Array ( [id] => 17645407 [patent_doc_number] => 20220173146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 17/387050 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8335 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387050 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387050
Image sensor Jul 27, 2021 Issued
Array ( [id] => 18827711 [patent_doc_number] => 11843001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Devices including stacked nanosheet transistors [patent_app_type] => utility [patent_app_number] => 17/380999 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 5896 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380999 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/380999
Devices including stacked nanosheet transistors Jul 19, 2021 Issued
Array ( [id] => 19901500 [patent_doc_number] => 12279453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/376557 [patent_app_country] => US [patent_app_date] => 2021-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 5641 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17376557 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/376557
Semiconductor device Jul 14, 2021 Issued
Array ( [id] => 17174245 [patent_doc_number] => 20210327916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/365174 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365174 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365174
Display device Jun 30, 2021 Issued
Array ( [id] => 18857230 [patent_doc_number] => 11854822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Anti-oxidation layer to prevent dielectric loss from planarization process [patent_app_type] => utility [patent_app_number] => 17/337803 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 8436 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337803 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/337803
Anti-oxidation layer to prevent dielectric loss from planarization process Jun 2, 2021 Issued
Array ( [id] => 18205530 [patent_doc_number] => 11587936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Low resistivity DRAM buried word line stack [patent_app_type] => utility [patent_app_number] => 17/335287 [patent_app_country] => US [patent_app_date] => 2021-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 9606 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17335287 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/335287
Low resistivity DRAM buried word line stack May 31, 2021 Issued
Array ( [id] => 17085407 [patent_doc_number] => 20210280414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => Device and Method for High Pressure Anneal [patent_app_type] => utility [patent_app_number] => 17/329477 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17985 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329477 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/329477
Device and method for high pressure anneal May 24, 2021 Issued
Array ( [id] => 17085572 [patent_doc_number] => 20210280579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/327123 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17327123 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/327123
Method for forming semiconductor device May 20, 2021 Issued
Array ( [id] => 17262586 [patent_doc_number] => 20210375571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => VACUUM CHANNEL FIELD EFFECT TRANSISTOR, PRODUCING METHOD THEREOF, AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/324923 [patent_app_country] => US [patent_app_date] => 2021-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324923 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/324923
Vacuum channel field effect transistor, producing method thereof, and semiconductor device May 18, 2021 Issued
Array ( [id] => 18688467 [patent_doc_number] => 11784213 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Integrated circuit device [patent_app_type] => utility [patent_app_number] => 17/315947 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 9955 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315947 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315947
Integrated circuit device May 9, 2021 Issued
Array ( [id] => 18507663 [patent_doc_number] => 11705492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Method for fabricating semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/246726 [patent_app_country] => US [patent_app_date] => 2021-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2344 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17246726 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/246726
Method for fabricating semiconductor structure May 2, 2021 Issued
Array ( [id] => 19193596 [patent_doc_number] => 20240172509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/788555 [patent_app_country] => US [patent_app_date] => 2021-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17788555 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/788555
Display panel and display device Apr 29, 2021 Issued
Array ( [id] => 17025403 [patent_doc_number] => 20210249275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/241704 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5287 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241704 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/241704
Semiconductor device structure and manufacturing method thereof Apr 26, 2021 Issued
Array ( [id] => 18840307 [patent_doc_number] => 11848391 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-19 [patent_title] => Passivation of infrared detectors using oxide layer [patent_app_type] => utility [patent_app_number] => 17/236303 [patent_app_country] => US [patent_app_date] => 2021-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2423 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17236303 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/236303
Passivation of infrared detectors using oxide layer Apr 20, 2021 Issued
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