Search

Preston Smith

Examiner (ID: 9382, Phone: (571)270-7084 , Office: P/1792 )

Most Active Art Unit
1792
Art Unit(s)
1794, 1792, 1782
Total Applications
477
Issued Applications
155
Pending Applications
9
Abandoned Applications
312

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19285750 [patent_doc_number] => 20240222227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => BACKSIDE CONTACTS FOR STACKED FIELD EFFECT TRANSISTORS [patent_app_type] => utility [patent_app_number] => 18/089655 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12853 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089655 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/089655
BACKSIDE CONTACTS FOR STACKED FIELD EFFECT TRANSISTORS Dec 27, 2022 Pending
Array ( [id] => 19886954 [patent_doc_number] => 12272687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Semiconductor device package with conductive pillars and reinforcing and encapsulating layers [patent_app_type] => utility [patent_app_number] => 18/076382 [patent_app_country] => US [patent_app_date] => 2022-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 42 [patent_no_of_words] => 6392 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18076382 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/076382
Semiconductor device package with conductive pillars and reinforcing and encapsulating layers Dec 5, 2022 Issued
Array ( [id] => 19146984 [patent_doc_number] => 20240146028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => METHOD FOR MANUFACTURING A DISTRIBUTED BRAGG REFLECTOR FOR 1550 NM VERTICAL-CAVITY SURFACE-EMITTING LASER [patent_app_type] => utility [patent_app_number] => 18/049828 [patent_app_country] => US [patent_app_date] => 2022-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6662 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18049828 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/049828
Method for manufacturing a distributed Bragg reflector for 1550 nm vertical-cavity surface-emitting laser Oct 25, 2022 Issued
Array ( [id] => 18975183 [patent_doc_number] => 20240055275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => MOVING BLADE CAVITY TECHNOLOGY FOR HIGH DENSE UNITS PER STRIP DESIGN [patent_app_type] => utility [patent_app_number] => 17/887595 [patent_app_country] => US [patent_app_date] => 2022-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7816 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887595 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/887595
MOVING BLADE CAVITY TECHNOLOGY FOR HIGH DENSE UNITS PER STRIP DESIGN Aug 14, 2022 Pending
Array ( [id] => 18008580 [patent_doc_number] => 20220367347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => CHIP STRUCTURE WITH CONDUCTIVE VIA STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/874048 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8707 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874048 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874048
CHIP STRUCTURE WITH CONDUCTIVE VIA STRUCTURE Jul 25, 2022 Pending
Array ( [id] => 18166780 [patent_doc_number] => 20230033385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => TRANSPARENT DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/869597 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869597 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869597
TRANSPARENT DISPLAY DEVICE Jul 19, 2022 Pending
Array ( [id] => 19153720 [patent_doc_number] => 11978643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Method for manufacturing semiconductor device including performing thermal treatment on substrate and semiconductor device [patent_app_type] => utility [patent_app_number] => 17/845119 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6798 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845119 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845119
Method for manufacturing semiconductor device including performing thermal treatment on substrate and semiconductor device Jun 20, 2022 Issued
Array ( [id] => 18821151 [patent_doc_number] => 20230395492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => Metal Pillars Preventing Wetting on Sidewalls and Method Forming Same [patent_app_type] => utility [patent_app_number] => 17/805034 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6954 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17805034 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/805034
Metal Pillars Preventing Wetting on Sidewalls and Method Forming Same Jun 1, 2022 Pending
Array ( [id] => 18022218 [patent_doc_number] => 20220373717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => FILM, ELEMENT, AND EQUIPMENT [patent_app_type] => utility [patent_app_number] => 17/741575 [patent_app_country] => US [patent_app_date] => 2022-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17741575 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/741575
FILM, ELEMENT, AND EQUIPMENT May 10, 2022 Pending
Array ( [id] => 17795539 [patent_doc_number] => 20220254631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => POROUS RF SWITCH FOR REDUCED CROSSTALK [patent_app_type] => utility [patent_app_number] => 17/733033 [patent_app_country] => US [patent_app_date] => 2022-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9007 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17733033 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/733033
POROUS RF SWITCH FOR REDUCED CROSSTALK Apr 28, 2022 Pending
Array ( [id] => 18729509 [patent_doc_number] => 20230343805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => OPTOELECTRONIC SYSTEM AND PHOTODETECTOR FOR OPTOELECTRONIC SYSTEM [patent_app_type] => utility [patent_app_number] => 17/727047 [patent_app_country] => US [patent_app_date] => 2022-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10122 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17727047 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/727047
OPTOELECTRONIC SYSTEM AND PHOTODETECTOR FOR OPTOELECTRONIC SYSTEM Apr 21, 2022 Pending
Array ( [id] => 17986411 [patent_doc_number] => 20220352448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => LIGHT EMITTING MODULE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/717143 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717143 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717143
LIGHT EMITTING MODULE AND DISPLAY DEVICE Apr 10, 2022 Pending
Array ( [id] => 20318131 [patent_doc_number] => 12456686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Three-dimensional memory device with multilevel drain-select electrodes and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/682466 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 88 [patent_figures_cnt] => 93 [patent_no_of_words] => 29475 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682466 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/682466
Three-dimensional memory device with multilevel drain-select electrodes and methods for forming the same Feb 27, 2022 Issued
Array ( [id] => 17833657 [patent_doc_number] => 20220270961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => STRUCTURES WITH DEFORMABLE CONDUCTORS [patent_app_type] => utility [patent_app_number] => 17/651651 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8923 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651651 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651651
STRUCTURES WITH DEFORMABLE CONDUCTORS Feb 17, 2022 Pending
Array ( [id] => 17795626 [patent_doc_number] => 20220254718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => METHOD FOR FUSING AND FILLING SEMICONDUCTOR STRUCTURE, AND SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/649165 [patent_app_country] => US [patent_app_date] => 2022-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5597 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649165 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649165
METHOD FOR FUSING AND FILLING SEMICONDUCTOR STRUCTURE, AND SEMICONDUCTOR STRUCTURE Jan 26, 2022 Abandoned
Array ( [id] => 17738234 [patent_doc_number] => 20220223696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => METHOD FOR MANUFACTURING POWER SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/574271 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3287 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17574271 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/574271
METHOD FOR MANUFACTURING POWER SEMICONDUCTOR DEVICE Jan 11, 2022 Abandoned
Array ( [id] => 18473363 [patent_doc_number] => 20230207651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAIN STRUCTURES WITH SUBSTRATE CONNECTION PORTIONS [patent_app_type] => utility [patent_app_number] => 17/561686 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17561686 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/561686
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAIN STRUCTURES WITH SUBSTRATE CONNECTION PORTIONS Dec 22, 2021 Pending
Array ( [id] => 19742948 [patent_doc_number] => 12219811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Display device having a separation structure to disconnect a light emitting layer [patent_app_type] => utility [patent_app_number] => 17/554888 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10345 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 419 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17554888 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/554888
Display device having a separation structure to disconnect a light emitting layer Dec 16, 2021 Issued
Array ( [id] => 17509167 [patent_doc_number] => 20220102270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => CONDUCTIVE CONTACT STRUCTURES FOR ELECTROSTATIC DISCHARGE PROTECTION IN INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 17/548728 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548728 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548728
CONDUCTIVE CONTACT STRUCTURES FOR ELECTROSTATIC DISCHARGE PROTECTION IN INTEGRATED CIRCUITS Dec 12, 2021 Pending
Array ( [id] => 18529870 [patent_doc_number] => 11716887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Light emitting display device with a reduced coupling capacitance between the conductive wiring lines [patent_app_type] => utility [patent_app_number] => 17/546971 [patent_app_country] => US [patent_app_date] => 2021-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13634 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17546971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/546971
Light emitting display device with a reduced coupling capacitance between the conductive wiring lines Dec 8, 2021 Issued
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