Search

Qian Yang

Examiner (ID: 3676, Phone: (571)270-7239 , Office: P/2674 )

Most Active Art Unit
2668
Art Unit(s)
2625, 2674, 2668, 2662
Total Applications
1035
Issued Applications
734
Pending Applications
61
Abandoned Applications
239

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7382140 [patent_doc_number] => 20040036515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'Method and circuit for adjusting the timing of output data based on an operational mode of output drivers' [patent_app_type] => new [patent_app_number] => 10/651602 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8226 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20040036515.pdf [firstpage_image] =>[orig_patent_app_number] => 10651602 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/651602
Method and circuit for adjusting the timing of output data based on an operational mode of output drivers Aug 28, 2003 Issued
Array ( [id] => 1041379 [patent_doc_number] => 06870404 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-22 [patent_title] => 'Programmable differential capacitors for equalization circuits' [patent_app_type] => utility [patent_app_number] => 10/652863 [patent_app_country] => US [patent_app_date] => 2003-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4112 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/870/06870404.pdf [firstpage_image] =>[orig_patent_app_number] => 10652863 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/652863
Programmable differential capacitors for equalization circuits Aug 27, 2003 Issued
Array ( [id] => 1083820 [patent_doc_number] => 06833740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-21 [patent_title] => 'Sinusoidal frequency generator and periodic signal converter using thereof' [patent_app_type] => B2 [patent_app_number] => 10/649711 [patent_app_country] => US [patent_app_date] => 2003-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3382 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/833/06833740.pdf [firstpage_image] =>[orig_patent_app_number] => 10649711 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/649711
Sinusoidal frequency generator and periodic signal converter using thereof Aug 25, 2003 Issued
Array ( [id] => 7377234 [patent_doc_number] => 20040178834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Phase-locked loop integrated circuits that support clock signal updates during dead zone compensation time intervals' [patent_app_type] => new [patent_app_number] => 10/640075 [patent_app_country] => US [patent_app_date] => 2003-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4305 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20040178834.pdf [firstpage_image] =>[orig_patent_app_number] => 10640075 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/640075
Phase-locked loop integrated circuits that support clock signal updates during dead zone compensation time intervals Aug 12, 2003 Issued
Array ( [id] => 1022853 [patent_doc_number] => 06888385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-03 [patent_title] => 'Phase locked loop (PLL) for integrated circuits' [patent_app_type] => utility [patent_app_number] => 10/639248 [patent_app_country] => US [patent_app_date] => 2003-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2018 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/888/06888385.pdf [firstpage_image] =>[orig_patent_app_number] => 10639248 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/639248
Phase locked loop (PLL) for integrated circuits Aug 11, 2003 Issued
Array ( [id] => 7355533 [patent_doc_number] => 20040090248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Programmable timing generator with offset and width control using delay lock loop' [patent_app_type] => new [patent_app_number] => 10/637401 [patent_app_country] => US [patent_app_date] => 2003-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1887 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20040090248.pdf [firstpage_image] =>[orig_patent_app_number] => 10637401 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/637401
Programmable timing generator with offset and width control using delay lock loop Aug 7, 2003 Abandoned
Array ( [id] => 991218 [patent_doc_number] => 06919745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-19 [patent_title] => 'Ring-resister controlled DLL with fine delay line and direct skew sensing detector' [patent_app_type] => utility [patent_app_number] => 10/635913 [patent_app_country] => US [patent_app_date] => 2003-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 7741 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/919/06919745.pdf [firstpage_image] =>[orig_patent_app_number] => 10635913 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/635913
Ring-resister controlled DLL with fine delay line and direct skew sensing detector Aug 6, 2003 Issued
Array ( [id] => 1098007 [patent_doc_number] => 06822486 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-23 [patent_title] => 'Multiplexer methods and apparatus' [patent_app_type] => B1 [patent_app_number] => 10/635968 [patent_app_country] => US [patent_app_date] => 2003-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4233 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/822/06822486.pdf [firstpage_image] =>[orig_patent_app_number] => 10635968 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/635968
Multiplexer methods and apparatus Aug 6, 2003 Issued
Array ( [id] => 7627692 [patent_doc_number] => 06806746 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-19 [patent_title] => 'Direct frequency synthesizer for offset loop synthesizer' [patent_app_type] => B1 [patent_app_number] => 10/633225 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3959 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806746.pdf [firstpage_image] =>[orig_patent_app_number] => 10633225 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/633225
Direct frequency synthesizer for offset loop synthesizer Jul 30, 2003 Issued
Array ( [id] => 7149048 [patent_doc_number] => 20050024116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Delay matching for clock distribution in a logic circuit' [patent_app_type] => utility [patent_app_number] => 10/632651 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4339 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20050024116.pdf [firstpage_image] =>[orig_patent_app_number] => 10632651 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/632651
Delay matching for clock distribution in a logic circuit Jul 30, 2003 Issued
Array ( [id] => 7629205 [patent_doc_number] => 06819152 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Circuitry for reducing leakage currents in a pre-charge circuit using very small MOSFET devices' [patent_app_type] => B1 [patent_app_number] => 10/630311 [patent_app_country] => US [patent_app_date] => 2003-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5088 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/819/06819152.pdf [firstpage_image] =>[orig_patent_app_number] => 10630311 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/630311
Circuitry for reducing leakage currents in a pre-charge circuit using very small MOSFET devices Jul 29, 2003 Issued
Array ( [id] => 1109615 [patent_doc_number] => 06809566 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-26 [patent_title] => 'Low power differential-to-single-ended converter with good duty cycle performance' [patent_app_type] => B1 [patent_app_number] => 10/630153 [patent_app_country] => US [patent_app_date] => 2003-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2896 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/809/06809566.pdf [firstpage_image] =>[orig_patent_app_number] => 10630153 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/630153
Low power differential-to-single-ended converter with good duty cycle performance Jul 29, 2003 Issued
Array ( [id] => 712703 [patent_doc_number] => 07057426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Frequency converter, orthogonal demodulator and orthogonal modulator' [patent_app_type] => utility [patent_app_number] => 10/622434 [patent_app_country] => US [patent_app_date] => 2003-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 5781 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 426 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/057/07057426.pdf [firstpage_image] =>[orig_patent_app_number] => 10622434 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/622434
Frequency converter, orthogonal demodulator and orthogonal modulator Jul 20, 2003 Issued
Array ( [id] => 7120695 [patent_doc_number] => 20050012524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-20 [patent_title] => 'PLL lock detection circuit using edge detection' [patent_app_type] => utility [patent_app_number] => 10/622627 [patent_app_country] => US [patent_app_date] => 2003-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4713 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20050012524.pdf [firstpage_image] =>[orig_patent_app_number] => 10622627 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/622627
PLL lock detection circuit using edge detection Jul 16, 2003 Issued
Array ( [id] => 997040 [patent_doc_number] => 06914464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Phase locked loop circuit using fractional frequency divider' [patent_app_type] => utility [patent_app_number] => 10/620509 [patent_app_country] => US [patent_app_date] => 2003-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3794 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914464.pdf [firstpage_image] =>[orig_patent_app_number] => 10620509 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/620509
Phase locked loop circuit using fractional frequency divider Jul 15, 2003 Issued
Array ( [id] => 1125811 [patent_doc_number] => 06794917 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'System and method for generating minimum on-time pulses' [patent_app_type] => B1 [patent_app_number] => 10/620100 [patent_app_country] => US [patent_app_date] => 2003-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/794/06794917.pdf [firstpage_image] =>[orig_patent_app_number] => 10620100 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/620100
System and method for generating minimum on-time pulses Jul 13, 2003 Issued
Array ( [id] => 7121242 [patent_doc_number] => 20050013071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-20 [patent_title] => 'Slew rate at buffers by isolating predriver from driver' [patent_app_type] => utility [patent_app_number] => 10/618479 [patent_app_country] => US [patent_app_date] => 2003-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3059 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20050013071.pdf [firstpage_image] =>[orig_patent_app_number] => 10618479 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/618479
Slew rate at buffers by isolating predriver from driver Jul 10, 2003 Issued
Array ( [id] => 6988700 [patent_doc_number] => 20050087813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'Direct conversion receiver using vertical bipolar junction transistor available in deep n-well cmos technology' [patent_app_type] => utility [patent_app_number] => 10/504366 [patent_app_country] => US [patent_app_date] => 2003-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6132 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20050087813.pdf [firstpage_image] =>[orig_patent_app_number] => 10504366 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/504366
Direct conversion receiver using vertical bipolar junction transistor available in deep n-well CMOS technology Jul 10, 2003 Issued
Array ( [id] => 7398442 [patent_doc_number] => 20040104751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Conditional clock buffer circuit' [patent_app_type] => new [patent_app_number] => 10/617080 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 17309 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20040104751.pdf [firstpage_image] =>[orig_patent_app_number] => 10617080 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/617080
Conditional clock buffer circuit Jul 9, 2003 Issued
Array ( [id] => 7382105 [patent_doc_number] => 20040036509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'Frequency synthesizer' [patent_app_type] => new [patent_app_number] => 10/615992 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1858 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20040036509.pdf [firstpage_image] =>[orig_patent_app_number] => 10615992 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/615992
Frequency synthesizer Jul 9, 2003 Issued
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