| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_issue_date] => 1998-11-24
[patent_title] => 'Policy caching method and apparatus for use in a communication device based on contents of one data unit in a subset of related data units'
[patent_app_type] => 1
[patent_app_number] => 8/666638
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/666638 | Policy caching method and apparatus for use in a communication device based on contents of one data unit in a subset of related data units | Jun 17, 1996 | Issued |
Array
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[patent_doc_number] => 06055590
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-25
[patent_title] => 'Bridge circuit comprising independent transaction buffers with control logic adapted to store overflow data in second buffer when transaction size exceeds the first buffer size'
[patent_app_type] => 1
[patent_app_number] => 8/658533
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 658533
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/658533 | Bridge circuit comprising independent transaction buffers with control logic adapted to store overflow data in second buffer when transaction size exceeds the first buffer size | Jun 4, 1996 | Issued |
Array
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[patent_doc_number] => 05956521
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-21
[patent_title] => 'System for universal electronic mail delivery where messaging devices are notified using a particular dialing, ringing, and hanging-up pattern'
[patent_app_type] => 1
[patent_app_number] => 8/656651
[patent_app_country] => US
[patent_app_date] => 1996-05-31
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[firstpage_image] =>[orig_patent_app_number] => 656651
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/656651 | System for universal electronic mail delivery where messaging devices are notified using a particular dialing, ringing, and hanging-up pattern | May 30, 1996 | Issued |
Array
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[patent_doc_number] => 05925109
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-20
[patent_title] => 'System for I/O management where I/O operations are determined to be direct or indirect based on hardware coupling manners and/or program privilege modes'
[patent_app_type] => 1
[patent_app_number] => 8/630387
[patent_app_country] => US
[patent_app_date] => 1996-04-10
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[firstpage_image] =>[orig_patent_app_number] => 630387
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/630387 | System for I/O management where I/O operations are determined to be direct or indirect based on hardware coupling manners and/or program privilege modes | Apr 9, 1996 | Issued |
Array
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[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Industrial controller with I/O mapping table for linking software addresses to physical network addresses'
[patent_app_type] => 1
[patent_app_number] => 8/630394
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/624235 | Methods for simplified integration of host based storage array control functions using read and write operations on a storage array control port | Mar 28, 1996 | Issued |
Array
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[patent_issue_date] => 1999-05-11
[patent_title] => 'External network network interface device without interim storage connected to high-speed serial bus with low latency and high transmission rate'
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[patent_app_number] => 8/624999
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/624999 | External network network interface device without interim storage connected to high-speed serial bus with low latency and high transmission rate | Mar 28, 1996 | Issued |
Array
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[id] => 3918149
[patent_doc_number] => 05898815
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'I/O bus interface recovery counter dependent upon minimum bus clocks to prevent overrun and ratio of execution core clock frequency to system bus clock frequency'
[patent_app_type] => 1
[patent_app_number] => 8/600781
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/600781 | I/O bus interface recovery counter dependent upon minimum bus clocks to prevent overrun and ratio of execution core clock frequency to system bus clock frequency | Feb 12, 1996 | Issued |
Array
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[patent_doc_number] => 05907719
[patent_country] => US
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[patent_issue_date] => 1999-05-25
[patent_title] => 'Communication interface unit employing two multiplexer circuits and control logic for performing parallel-to-serial data conversion of a selected asynchronous protocol'
[patent_app_type] => 1
[patent_app_number] => 8/589663
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/589663 | Communication interface unit employing two multiplexer circuits and control logic for performing parallel-to-serial data conversion of a selected asynchronous protocol | Jan 21, 1996 | Issued |
Array
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[patent_doc_number] => 05828900
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[patent_issue_date] => 1998-10-27
[patent_title] => 'International multiple-byte character generator support in application sharing which distinguishes guest keyboard input from host key board and bypassing execution of the generator module when guest keyboard input is determined'
[patent_app_type] => 1
[patent_app_number] => 8/579722
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[firstpage_image] =>[orig_patent_app_number] => 579722
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/579722 | International multiple-byte character generator support in application sharing which distinguishes guest keyboard input from host key board and bypassing execution of the generator module when guest keyboard input is determined | Jan 2, 1996 | Issued |
Array
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[patent_issue_date] => 1999-08-24
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Array
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Array
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Array
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Array
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