| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3759408
[patent_doc_number] => 05843807
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Method of manufacturing an ultra-high density warp-resistant memory module'
[patent_app_type] => 1
[patent_app_number] => 8/686985
[patent_app_country] => US
[patent_app_date] => 1996-07-25
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/843/05843807.pdf
[firstpage_image] =>[orig_patent_app_number] => 686985
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/686985 | Method of manufacturing an ultra-high density warp-resistant memory module | Jul 24, 1996 | Issued |
Array
(
[id] => 3786193
[patent_doc_number] => 05736456
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-07
[patent_title] => 'Method of forming conductive bumps on die for flip chip applications'
[patent_app_type] => 1
[patent_app_number] => 8/682141
[patent_app_country] => US
[patent_app_date] => 1996-07-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/736/05736456.pdf
[firstpage_image] =>[orig_patent_app_number] => 682141
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/682141 | Method of forming conductive bumps on die for flip chip applications | Jul 16, 1996 | Issued |
Array
(
[id] => 3804451
[patent_doc_number] => 05830782
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'Microelectronic element bonding with deformation of leads in rows'
[patent_app_type] => 1
[patent_app_number] => 8/678808
[patent_app_country] => US
[patent_app_date] => 1996-07-12
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/830/05830782.pdf
[firstpage_image] =>[orig_patent_app_number] => 678808
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/678808 | Microelectronic element bonding with deformation of leads in rows | Jul 11, 1996 | Issued |
Array
(
[id] => 3740817
[patent_doc_number] => 05786271
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-28
[patent_title] => 'Production of semiconductor package having semiconductor chip mounted with its face down on substrate with protruded electrodes therebetween and semiconductor package'
[patent_app_type] => 1
[patent_app_number] => 8/675213
[patent_app_country] => US
[patent_app_date] => 1996-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/786/05786271.pdf
[firstpage_image] =>[orig_patent_app_number] => 675213
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/675213 | Production of semiconductor package having semiconductor chip mounted with its face down on substrate with protruded electrodes therebetween and semiconductor package | Jul 2, 1996 | Issued |
Array
(
[id] => 3870219
[patent_doc_number] => 05763325
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Fabrication process of a semiconductor device using a slurry containing manganese oxide'
[patent_app_type] => 1
[patent_app_number] => 8/674507
[patent_app_country] => US
[patent_app_date] => 1996-07-02
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/763/05763325.pdf
[firstpage_image] =>[orig_patent_app_number] => 674507
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/674507 | Fabrication process of a semiconductor device using a slurry containing manganese oxide | Jul 1, 1996 | Issued |
Array
(
[id] => 3647314
[patent_doc_number] => 05683941
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-04
[patent_title] => 'Self-aligned polycide process that utilizes a planarized layer of material to expose polysilicon structures to a subsequently deposited metal layer that is reacted to form the metal silicide'
[patent_app_type] => 1
[patent_app_number] => 8/678417
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[pdf_file] => patents/05/683/05683941.pdf
[firstpage_image] =>[orig_patent_app_number] => 678417
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/678417 | Self-aligned polycide process that utilizes a planarized layer of material to expose polysilicon structures to a subsequently deposited metal layer that is reacted to form the metal silicide | Jul 1, 1996 | Issued |
Array
(
[id] => 3804333
[patent_doc_number] => 05830774
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'Method for forming a metal pattern on a substrate'
[patent_app_type] => 1
[patent_app_number] => 8/667013
[patent_app_country] => US
[patent_app_date] => 1996-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/830/05830774.pdf
[firstpage_image] =>[orig_patent_app_number] => 667013
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/667013 | Method for forming a metal pattern on a substrate | Jun 23, 1996 | Issued |
Array
(
[id] => 3660738
[patent_doc_number] => 05656552
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-12
[patent_title] => 'Method of making a thin conformal high-yielding multi-chip module'
[patent_app_type] => 1
[patent_app_number] => 8/668879
[patent_app_country] => US
[patent_app_date] => 1996-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 4822
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[pdf_file] => patents/05/656/05656552.pdf
[firstpage_image] =>[orig_patent_app_number] => 668879
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/668879 | Method of making a thin conformal high-yielding multi-chip module | Jun 23, 1996 | Issued |
Array
(
[id] => 3791878
[patent_doc_number] => 05780361
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Salicide process for selectively forming a monocobalt disilicide film on a silicon region'
[patent_app_type] => 1
[patent_app_number] => 8/667647
[patent_app_country] => US
[patent_app_date] => 1996-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/780/05780361.pdf
[firstpage_image] =>[orig_patent_app_number] => 667647
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/667647 | Salicide process for selectively forming a monocobalt disilicide film on a silicon region | Jun 20, 1996 | Issued |
| 08/662587 | FABRICATION OF ELECTRONIC COMPONENTS HAVING A HOLLOW PACKAGE STRUCTURE WITH A CERAMIC LID | Jun 12, 1996 | Abandoned |
Array
(
[id] => 3812392
[patent_doc_number] => 05710063
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-20
[patent_title] => 'Method for improving the alignment of holes with other elements on a printed circuit board'
[patent_app_type] => 1
[patent_app_number] => 8/660091
[patent_app_country] => US
[patent_app_date] => 1996-06-06
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[patent_drawing_sheets_cnt] => 11
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/710/05710063.pdf
[firstpage_image] =>[orig_patent_app_number] => 660091
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/660091 | Method for improving the alignment of holes with other elements on a printed circuit board | Jun 5, 1996 | Issued |
Array
(
[id] => 3791891
[patent_doc_number] => 05780362
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'CoSi.sub.2 salicide method'
[patent_app_type] => 1
[patent_app_number] => 8/658182
[patent_app_country] => US
[patent_app_date] => 1996-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[pdf_file] => patents/05/780/05780362.pdf
[firstpage_image] =>[orig_patent_app_number] => 658182
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/658182 | CoSi.sub.2 salicide method | Jun 3, 1996 | Issued |
Array
(
[id] => 4041997
[patent_doc_number] => 05874319
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-23
[patent_title] => 'Vacuum die bond for known good die assembly'
[patent_app_type] => 1
[patent_app_number] => 8/651065
[patent_app_country] => US
[patent_app_date] => 1996-05-21
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[pdf_file] => patents/05/874/05874319.pdf
[firstpage_image] =>[orig_patent_app_number] => 651065
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/651065 | Vacuum die bond for known good die assembly | May 20, 1996 | Issued |
| 08/650407 | TAPE CARRIER PACKAGE WITH INTEGRAL HEAT SINK AND METHOD FOR MOUNTING SAME ON A PRINTED CIRCUIT BOARD | May 19, 1996 | Abandoned |
| 08/650429 | METHOD OF FABRICATION OF STACKED SEMICONDUCTOR DEVICES | May 19, 1996 | Abandoned |
Array
(
[id] => 3646035
[patent_doc_number] => 05637533
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-10
[patent_title] => 'Method for fabricating a diffusion barrier metal layer in a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/648285
[patent_app_country] => US
[patent_app_date] => 1996-05-15
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[pdf_file] => patents/05/637/05637533.pdf
[firstpage_image] =>[orig_patent_app_number] => 648285
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/648285 | Method for fabricating a diffusion barrier metal layer in a semiconductor device | May 14, 1996 | Issued |
Array
(
[id] => 3687695
[patent_doc_number] => 05691243
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Process for manufacturing composite semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/647725
[patent_app_country] => US
[patent_app_date] => 1996-05-15
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[firstpage_image] =>[orig_patent_app_number] => 647725
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/647725 | Process for manufacturing composite semiconductor device | May 14, 1996 | Issued |
Array
(
[id] => 4034490
[patent_doc_number] => 05856212
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-05
[patent_title] => 'Method of producing semiconductor package having solder balls'
[patent_app_type] => 1
[patent_app_number] => 8/646569
[patent_app_country] => US
[patent_app_date] => 1996-05-08
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[pdf_file] => patents/05/856/05856212.pdf
[firstpage_image] =>[orig_patent_app_number] => 646569
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/646569 | Method of producing semiconductor package having solder balls | May 7, 1996 | Issued |
Array
(
[id] => 3694784
[patent_doc_number] => 05618756
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-08
[patent_title] => 'Selective WSix deposition'
[patent_app_type] => 1
[patent_app_number] => 8/639391
[patent_app_country] => US
[patent_app_date] => 1996-04-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/618/05618756.pdf
[firstpage_image] =>[orig_patent_app_number] => 639391
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/639391 | Selective WSix deposition | Apr 28, 1996 | Issued |
Array
(
[id] => 3730084
[patent_doc_number] => 05693559
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[patent_kind] => NA
[patent_issue_date] => 1997-12-02
[patent_title] => 'Method for printing solder paste'
[patent_app_type] => 1
[patent_app_number] => 8/631021
[patent_app_country] => US
[patent_app_date] => 1996-04-12
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[firstpage_image] =>[orig_patent_app_number] => 631021
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/631021 | Method for printing solder paste | Apr 11, 1996 | Issued |