
Quang Pham
Examiner (ID: 17839, Phone: (571)270-3668 , Office: P/2684 )
| Most Active Art Unit | 2684 |
| Art Unit(s) | 2685, 2612, 2684 |
| Total Applications | 836 |
| Issued Applications | 452 |
| Pending Applications | 74 |
| Abandoned Applications | 327 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6762994
[patent_doc_number] => 20030126356
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-03
[patent_title] => ' Memory system having synchronous-link DRAM (SLDRAM) devices and controller'
[patent_app_type] => new
[patent_app_number] => 10/176327
[patent_app_country] => US
[patent_app_date] => 2002-06-19
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0126/20030126356.pdf
[firstpage_image] =>[orig_patent_app_number] => 10176327
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/176327 | Memory system having synchronous-link DRAM (SLDRAM) devices and controller | Jun 18, 2002 | Abandoned |
Array
(
[id] => 633368
[patent_doc_number] => 07133999
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-11-07
[patent_title] => 'Method and system for local memory addressing in single instruction, multiple data computer system'
[patent_app_type] => utility
[patent_app_number] => 10/171049
[patent_app_country] => US
[patent_app_date] => 2002-06-12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/171049 | Method and system for local memory addressing in single instruction, multiple data computer system | Jun 11, 2002 | Issued |
Array
(
[id] => 6746624
[patent_doc_number] => 20030023807
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Disk drive device and control device thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/166097 | Disk drive device and control device thereof | Jun 10, 2002 | Abandoned |
Array
(
[id] => 6265367
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[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-12
[patent_title] => 'Non-volatile storage device and rewrite control method thereof'
[patent_app_type] => new
[patent_app_number] => 10/164657
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/164657 | Non-volatile storage device and rewrite control method thereof | Jun 5, 2002 | Issued |
Array
(
[id] => 6771283
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[patent_issue_date] => 2003-11-20
[patent_title] => 'Combined command set'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/145760 | Combined command set | May 13, 2002 | Abandoned |
Array
(
[id] => 1415646
[patent_doc_number] => 06549981
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-04-15
[patent_title] => 'Disk array system with controllers that automate host side of ATA interface'
[patent_app_type] => B2
[patent_app_number] => 10/142562
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[firstpage_image] =>[orig_patent_app_number] => 10142562
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/142562 | Disk array system with controllers that automate host side of ATA interface | May 8, 2002 | Issued |
Array
(
[id] => 1082980
[patent_doc_number] => 06836821
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[patent_issue_date] => 2004-12-28
[patent_title] => 'System and method for providing graph structuring for layered virtual volumes'
[patent_app_type] => B2
[patent_app_number] => 10/127870
[patent_app_country] => US
[patent_app_date] => 2002-04-23
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[pdf_file] => patents/06/836/06836821.pdf
[firstpage_image] =>[orig_patent_app_number] => 10127870
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/127870 | System and method for providing graph structuring for layered virtual volumes | Apr 22, 2002 | Issued |
Array
(
[id] => 6810456
[patent_doc_number] => 20030200395
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[patent_issue_date] => 2003-10-23
[patent_title] => 'Interleaved n-way set-associative external cache'
[patent_app_type] => new
[patent_app_number] => 10/127172
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/127172 | Interleaved n-way set-associative external cache | Apr 21, 2002 | Issued |
Array
(
[id] => 6810465
[patent_doc_number] => 20030200404
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[patent_issue_date] => 2003-10-23
[patent_title] => 'N-way set-associative external cache with standard DDR memory devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/127173 | N-way set-associative external cache with standard DDR memory devices | Apr 21, 2002 | Issued |
Array
(
[id] => 6810450
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[patent_title] => 'System and method of cache management for storage controllers'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/125712 | System and method of cache management for storage controllers | Apr 17, 2002 | Issued |
Array
(
[id] => 6780019
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[patent_title] => 'Cache for large-object real-time latency elimination'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/125050 | Cache for large-object real-time latency elimination | Apr 17, 2002 | Issued |
Array
(
[id] => 6731931
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Array
(
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Array
(
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Array
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Array
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Array
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Array
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Array
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Array
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