Search

Quovaunda Jefferson

Examiner (ID: 11007, Phone: (571)272-5051 , Office: P/2899 )

Most Active Art Unit
2899
Art Unit(s)
2823, 2899
Total Applications
1137
Issued Applications
831
Pending Applications
88
Abandoned Applications
234

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19494333 [patent_doc_number] => 12113057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Symmetric FET for RF nonlinearity improvement [patent_app_type] => utility [patent_app_number] => 17/225625 [patent_app_country] => US [patent_app_date] => 2021-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 8738 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225625 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/225625
Symmetric FET for RF nonlinearity improvement Apr 7, 2021 Issued
Array ( [id] => 19071431 [patent_doc_number] => 20240105857 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-03-28 [patent_title] => HIGH-VOLTAGE LATERAL GAN-ON-SILICON SCHOTTKY DIODE WITH REDUCED JUNCTION LEAKAGE CURRENT [patent_app_type] => utility [patent_app_number] => 17/211116 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11543 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211116 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211116
Lateral Schottky diode Mar 23, 2021 Issued
Array ( [id] => 19071431 [patent_doc_number] => 20240105857 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-03-28 [patent_title] => HIGH-VOLTAGE LATERAL GAN-ON-SILICON SCHOTTKY DIODE WITH REDUCED JUNCTION LEAKAGE CURRENT [patent_app_type] => utility [patent_app_number] => 17/211116 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11543 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211116 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211116
Lateral Schottky diode Mar 23, 2021 Issued
Array ( [id] => 17886400 [patent_doc_number] => 20220301878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SUBSTRATE THINNING FOR A BACKSIDE POWER DISTRIBUTION NETWORK [patent_app_type] => utility [patent_app_number] => 17/205037 [patent_app_country] => US [patent_app_date] => 2021-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17205037 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/205037
Substrate thinning for a backside power distribution network Mar 17, 2021 Issued
Array ( [id] => 18837960 [patent_doc_number] => 11846024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Laser-assisted metal-organic chemical vapor deposition devices and methods of use thereof for suppressing background carbon incorporation [patent_app_type] => utility [patent_app_number] => 17/201815 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 45 [patent_no_of_words] => 62348 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201815 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/201815
Laser-assisted metal-organic chemical vapor deposition devices and methods of use thereof for suppressing background carbon incorporation Mar 14, 2021 Issued
Array ( [id] => 18408855 [patent_doc_number] => 20230170208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => METHOD FOR FORMING THERMAL OXIDE FILM ON SEMICONDUCTOR SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/920227 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17920227 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/920227
Method for forming thermal oxide film on semiconductor substrate Mar 7, 2021 Issued
Array ( [id] => 20441494 [patent_doc_number] => 12512336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Substrate processing method and substrate processing apparatus [patent_app_type] => utility [patent_app_number] => 17/907224 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 2426 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17907224 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/907224
Substrate processing method and substrate processing apparatus Mar 1, 2021 Issued
Array ( [id] => 16936374 [patent_doc_number] => 20210202263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/183599 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 312 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183599 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/183599
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME Feb 23, 2021 Abandoned
Array ( [id] => 16904730 [patent_doc_number] => 20210183646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => Low-k Dielectric and Processes for Forming Same [patent_app_type] => utility [patent_app_number] => 17/183807 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6514 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183807 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/183807
Low-k dielectric and processes for forming same Feb 23, 2021 Issued
Array ( [id] => 17956341 [patent_doc_number] => 11482454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-25 [patent_title] => Methods for forming self-aligned contacts using spin-on silicon carbide [patent_app_type] => utility [patent_app_number] => 17/177379 [patent_app_country] => US [patent_app_date] => 2021-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6763 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17177379 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/177379
Methods for forming self-aligned contacts using spin-on silicon carbide Feb 16, 2021 Issued
Array ( [id] => 17660685 [patent_doc_number] => 20220181150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => SILICON ON INSULATOR STRUCTURE AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 17/161318 [patent_app_country] => US [patent_app_date] => 2021-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4579 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17161318 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/161318
Silicon on insulator structure and method of making the same Jan 27, 2021 Issued
Array ( [id] => 17765047 [patent_doc_number] => 20220238660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => Method of Forming Backside Power Rails [patent_app_type] => utility [patent_app_number] => 17/159999 [patent_app_country] => US [patent_app_date] => 2021-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9688 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17159999 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/159999
Method of forming backside power rails Jan 26, 2021 Issued
Array ( [id] => 17509042 [patent_doc_number] => 20220102145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => METHOD FOR FORMING RECESS AND FILLING EPITAXIAL LAYER IN SITU [patent_app_type] => utility [patent_app_number] => 17/158901 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4153 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158901 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158901
METHOD FOR FORMING RECESS AND FILLING EPITAXIAL LAYER IN SITU Jan 25, 2021 Abandoned
Array ( [id] => 19654416 [patent_doc_number] => 12176216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium [patent_app_type] => utility [patent_app_number] => 17/150095 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 11709 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17150095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/150095
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium Jan 14, 2021 Issued
Array ( [id] => 18796895 [patent_doc_number] => 11830729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Low-k boron carbonitride films [patent_app_type] => utility [patent_app_number] => 17/144972 [patent_app_country] => US [patent_app_date] => 2021-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5494 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17144972 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/144972
Low-k boron carbonitride films Jan 7, 2021 Issued
Array ( [id] => 17417036 [patent_doc_number] => 20220051940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => CONTACT PLUG [patent_app_type] => utility [patent_app_number] => 17/142750 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142750
Contact plug Jan 5, 2021 Issued
Array ( [id] => 17723380 [patent_doc_number] => 20220216102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => SEMICONDUCTOR DEVICE WITH LOW-GALVANIC CORROSION STRUCTURES, AND METHOD OF MAKING SAME [patent_app_type] => utility [patent_app_number] => 17/140414 [patent_app_country] => US [patent_app_date] => 2021-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140414 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/140414
Semiconductor device with low-galvanic corrosion structures, and method of making same Jan 3, 2021 Issued
Array ( [id] => 16796118 [patent_doc_number] => 20210125935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => Conductive Contact Having Staircase-Like Barrier Layers [patent_app_type] => utility [patent_app_number] => 17/140654 [patent_app_country] => US [patent_app_date] => 2021-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140654 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/140654
Conductive contact having barrier layers with different depths Jan 3, 2021 Issued
Array ( [id] => 17582907 [patent_doc_number] => 20220139762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => TRANSISTOR STRUCTURE WITH AIR GAP AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/133652 [patent_app_country] => US [patent_app_date] => 2020-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4103 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17133652 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/133652
Transistor structure with air gap and method of fabricating the same Dec 23, 2020 Issued
Array ( [id] => 16827728 [patent_doc_number] => 20210143021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => METHOD FOR FABRICATING ELECTRONIC PACKAGE [patent_app_type] => utility [patent_app_number] => 17/123630 [patent_app_country] => US [patent_app_date] => 2020-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17123630 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/123630
Method for fabricating electronic package Dec 15, 2020 Issued
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