Search

Quovaunda Jefferson

Examiner (ID: 10712, Phone: (571)272-5051 , Office: P/2899 )

Most Active Art Unit
2899
Art Unit(s)
2823, 2899
Total Applications
1106
Issued Applications
814
Pending Applications
86
Abandoned Applications
234

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19646476 [patent_doc_number] => 20240420996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => SELECTIVE SELF-ASSEMBLED MONOLAYER (SAM) REMOVAL [patent_app_type] => utility [patent_app_number] => 18/209035 [patent_app_country] => US [patent_app_date] => 2023-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8227 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209035 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/209035
SELECTIVE SELF-ASSEMBLED MONOLAYER (SAM) REMOVAL Jun 12, 2023 Pending
Array ( [id] => 18903162 [patent_doc_number] => 20240018647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => OXIDATION BARRIERS WITH CVD SOAK PROCESSES [patent_app_type] => utility [patent_app_number] => 18/209257 [patent_app_country] => US [patent_app_date] => 2023-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209257 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/209257
Oxidation barriers with CVD soak processes Jun 12, 2023 Issued
Array ( [id] => 18866049 [patent_doc_number] => 20230420486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => ATOMIC LAYER DEPOSITION OF HIGH DIELECTRIC CONSTANT MATERIALS [patent_app_type] => utility [patent_app_number] => 18/208710 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18208710 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/208710
ATOMIC LAYER DEPOSITION OF HIGH DIELECTRIC CONSTANT MATERIALS Jun 11, 2023 Pending
Array ( [id] => 18898591 [patent_doc_number] => 20240014076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SELECTIVE CAPPING OF CONTACT LAYER FOR CMOS DEVICES [patent_app_type] => utility [patent_app_number] => 18/206427 [patent_app_country] => US [patent_app_date] => 2023-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18206427 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/206427
SELECTIVE CAPPING OF CONTACT LAYER FOR CMOS DEVICES Jun 5, 2023 Pending
Array ( [id] => 18821060 [patent_doc_number] => 20230395401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => WAFER PROCESSING METHOD AND WAFER PROCESSING SYSTEM [patent_app_type] => utility [patent_app_number] => 18/324262 [patent_app_country] => US [patent_app_date] => 2023-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6816 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18324262 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/324262
WAFER PROCESSING METHOD AND WAFER PROCESSING SYSTEM May 25, 2023 Pending
Array ( [id] => 20111499 [patent_doc_number] => 12362235 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Barrier free interface between BEOL interconnects [patent_app_type] => utility [patent_app_number] => 18/318917 [patent_app_country] => US [patent_app_date] => 2023-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 4420 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18318917 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/318917
Barrier free interface between BEOL interconnects May 16, 2023 Issued
Array ( [id] => 18631870 [patent_doc_number] => 20230290775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => SEMICONDUCTOR DEVICE WITH LOW NOISE TRANSISTOR AND LOW TEMPERATURE COEFFICIENT RESISTOR [patent_app_type] => utility [patent_app_number] => 18/317227 [patent_app_country] => US [patent_app_date] => 2023-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11366 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18317227 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/317227
Semiconductor device with low noise transistor and low temperature coefficient resistor May 14, 2023 Issued
Array ( [id] => 18568700 [patent_doc_number] => 20230259036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => Method for Reducing Line-End Space in Integrated Circuit Patterning [patent_app_type] => utility [patent_app_number] => 18/305536 [patent_app_country] => US [patent_app_date] => 2023-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18305536 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/305536
Method for reducing line-end space in integrated circuit patterning Apr 23, 2023 Issued
Array ( [id] => 19023063 [patent_doc_number] => 20240079234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => VAPOR DEPOSITION OF TELLURIUM NANOMESH ELECTRONICS ON ARBITRARY SURFACES AT LOW TEMPERATURE [patent_app_type] => utility [patent_app_number] => 18/194098 [patent_app_country] => US [patent_app_date] => 2023-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10370 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18194098 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/194098
VAPOR DEPOSITION OF TELLURIUM NANOMESH ELECTRONICS ON ARBITRARY SURFACES AT LOW TEMPERATURE Mar 30, 2023 Pending
Array ( [id] => 19483971 [patent_doc_number] => 20240332013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/193041 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18193041 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/193041
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Mar 29, 2023 Pending
Array ( [id] => 19483958 [patent_doc_number] => 20240332000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => DOPED SILICON-CONTAINING MATERIALS WITH INCREASED ELECTRICAL, MECHANICAL, AND ETCH CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 18/192573 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6966 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18192573 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/192573
DOPED SILICON-CONTAINING MATERIALS WITH INCREASED ELECTRICAL, MECHANICAL, AND ETCH CHARACTERISTICS Mar 28, 2023 Pending
Array ( [id] => 19720293 [patent_doc_number] => 12205836 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Temperature change rate control device, method, and semiconductor process apparatus [patent_app_type] => utility [patent_app_number] => 18/191707 [patent_app_country] => US [patent_app_date] => 2023-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5192 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18191707 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/191707
Temperature change rate control device, method, and semiconductor process apparatus Mar 27, 2023 Issued
Array ( [id] => 20244160 [patent_doc_number] => 12424491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Semiconductor device with low-galvanic corrosion structures, and method of making same [patent_app_type] => utility [patent_app_number] => 18/190868 [patent_app_country] => US [patent_app_date] => 2023-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18190868 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/190868
Semiconductor device with low-galvanic corrosion structures, and method of making same Mar 26, 2023 Issued
Array ( [id] => 19452776 [patent_doc_number] => 20240312906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR DEVICE AND METHODS OF FORMATION [patent_app_type] => utility [patent_app_number] => 18/185587 [patent_app_country] => US [patent_app_date] => 2023-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13521 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18185587 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/185587
SEMICONDUCTOR DEVICE AND METHODS OF FORMATION Mar 16, 2023 Pending
Array ( [id] => 19436048 [patent_doc_number] => 20240304546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => LOW RESISTANCE SEMICONDUCTOR INTERCONNECT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/179417 [patent_app_country] => US [patent_app_date] => 2023-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18179417 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/179417
LOW RESISTANCE SEMICONDUCTOR INTERCONNECT STRUCTURE Mar 6, 2023 Pending
Array ( [id] => 18456354 [patent_doc_number] => 20230197636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => ELECTRONIC PACKAGE ASSEMBLY WITH STIFFENER [patent_app_type] => utility [patent_app_number] => 18/112431 [patent_app_country] => US [patent_app_date] => 2023-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18112431 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/112431
ELECTRONIC PACKAGE ASSEMBLY WITH STIFFENER Feb 20, 2023 Pending
Array ( [id] => 18600132 [patent_doc_number] => 20230274933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => Methods for Transferring Graphene to Substrates and Related Lithographic Stacks and Laminates [patent_app_type] => utility [patent_app_number] => 18/112159 [patent_app_country] => US [patent_app_date] => 2023-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18112159 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/112159
Methods for Transferring Graphene to Substrates and Related Lithographic Stacks and Laminates Feb 20, 2023 Pending
Array ( [id] => 19906550 [patent_doc_number] => 12283569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Semiconductor device package and a method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/112463 [patent_app_country] => US [patent_app_date] => 2023-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 2007 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18112463 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/112463
Semiconductor device package and a method of manufacturing the same Feb 20, 2023 Issued
Array ( [id] => 19392752 [patent_doc_number] => 20240282622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => SEMICONDUCTOR DEVICE WITH AIR GAP AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/171839 [patent_app_country] => US [patent_app_date] => 2023-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171839 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/171839
SEMICONDUCTOR DEVICE WITH AIR GAP AND METHOD FOR MANUFACTURING THE SAME Feb 20, 2023 Pending
Array ( [id] => 18585920 [patent_doc_number] => 20230268184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => THIN FILM DEPOSITION METHOD AND MANUFACTURING METHOD OF ELECTRONIC DEVICE APPLYING THE SAME [patent_app_type] => utility [patent_app_number] => 18/169799 [patent_app_country] => US [patent_app_date] => 2023-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18169799 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/169799
THIN FILM DEPOSITION METHOD AND MANUFACTURING METHOD OF ELECTRONIC DEVICE APPLYING THE SAME Feb 14, 2023 Pending
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