Search

Rachna Singh Desai

Examiner (ID: 7987, Phone: (571)272-4099 , Office: P/3992 )

Most Active Art Unit
2176
Art Unit(s)
3992, 2176
Total Applications
380
Issued Applications
192
Pending Applications
75
Abandoned Applications
118

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2848643 [patent_doc_number] => 05161169 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-03 [patent_title] => 'DCD with reprogramming instructions contained in removable cartridge' [patent_app_type] => 1 [patent_app_number] => 7/523626 [patent_app_country] => US [patent_app_date] => 1990-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1584 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/161/05161169.pdf [firstpage_image] =>[orig_patent_app_number] => 523626 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/523626
DCD with reprogramming instructions contained in removable cartridge May 14, 1990 Issued
Array ( [id] => 2744876 [patent_doc_number] => 05077761 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-31 [patent_title] => 'Elastic buffer circuit' [patent_app_type] => 1 [patent_app_number] => 7/520667 [patent_app_country] => US [patent_app_date] => 1990-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3318 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/077/05077761.pdf [firstpage_image] =>[orig_patent_app_number] => 520667 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/520667
Elastic buffer circuit May 7, 1990 Issued
Array ( [id] => 2882456 [patent_doc_number] => 05091921 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-25 [patent_title] => 'Direct conversion receiver with dithering local carrier frequency for detecting transmitted carrier frequency' [patent_app_type] => 1 [patent_app_number] => 7/511696 [patent_app_country] => US [patent_app_date] => 1990-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4265 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/091/05091921.pdf [firstpage_image] =>[orig_patent_app_number] => 511696 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/511696
Direct conversion receiver with dithering local carrier frequency for detecting transmitted carrier frequency Apr 19, 1990 Issued
Array ( [id] => 2717205 [patent_doc_number] => 04993048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-12 [patent_title] => 'Self-clocking system' [patent_app_type] => 1 [patent_app_number] => 7/510526 [patent_app_country] => US [patent_app_date] => 1990-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1827 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/993/04993048.pdf [firstpage_image] =>[orig_patent_app_number] => 510526 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/510526
Self-clocking system Apr 17, 1990 Issued
07/509462 METHOD AND APPARATUS FOR CORRECTING FOR CLOCK AND CARRIER FREQUENCY OFFSET, AND PHASE JITTER IN MULTICARRIER MODEMS Apr 15, 1990 Issued
Array ( [id] => 2796207 [patent_doc_number] => 05142552 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-25 [patent_title] => 'Method and apparatus for analog D.C. offset cancellation' [patent_app_type] => 1 [patent_app_number] => 7/508496 [patent_app_country] => US [patent_app_date] => 1990-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2220 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/142/05142552.pdf [firstpage_image] =>[orig_patent_app_number] => 508496 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/508496
Method and apparatus for analog D.C. offset cancellation Apr 9, 1990 Issued
Array ( [id] => 2755904 [patent_doc_number] => 05023892 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-11 [patent_title] => 'System for detecting and correcting signal distortion' [patent_app_type] => 1 [patent_app_number] => 7/505597 [patent_app_country] => US [patent_app_date] => 1990-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4166 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/023/05023892.pdf [firstpage_image] =>[orig_patent_app_number] => 505597 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/505597
System for detecting and correcting signal distortion Apr 5, 1990 Issued
Array ( [id] => 2864866 [patent_doc_number] => 05127026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-30 [patent_title] => 'Circuit and method for extracting clock signal from a serial data stream' [patent_app_type] => 1 [patent_app_number] => 7/505857 [patent_app_country] => US [patent_app_date] => 1990-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/127/05127026.pdf [firstpage_image] =>[orig_patent_app_number] => 505857 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/505857
Circuit and method for extracting clock signal from a serial data stream Apr 4, 1990 Issued
Array ( [id] => 2827889 [patent_doc_number] => 05081652 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-14 [patent_title] => 'Offset correction' [patent_app_type] => 1 [patent_app_number] => 7/505016 [patent_app_country] => US [patent_app_date] => 1990-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3265 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/081/05081652.pdf [firstpage_image] =>[orig_patent_app_number] => 505016 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/505016
Offset correction Apr 3, 1990 Issued
Array ( [id] => 2986569 [patent_doc_number] => 05208838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-04 [patent_title] => 'Clock signal multiplier' [patent_app_type] => 1 [patent_app_number] => 7/502207 [patent_app_country] => US [patent_app_date] => 1990-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3193 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/208/05208838.pdf [firstpage_image] =>[orig_patent_app_number] => 502207 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/502207
Clock signal multiplier Mar 29, 1990 Issued
Array ( [id] => 2736389 [patent_doc_number] => 05058142 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-15 [patent_title] => 'Clock extracting circuit in digital-line signal receiver' [patent_app_type] => 1 [patent_app_number] => 7/501925 [patent_app_country] => US [patent_app_date] => 1990-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6033 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/058/05058142.pdf [firstpage_image] =>[orig_patent_app_number] => 501925 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/501925
Clock extracting circuit in digital-line signal receiver Mar 29, 1990 Issued
Array ( [id] => 2890539 [patent_doc_number] => 05109391 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-28 [patent_title] => 'Unbalanced transmitter and receiver' [patent_app_type] => 1 [patent_app_number] => 7/497016 [patent_app_country] => US [patent_app_date] => 1990-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3349 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/109/05109391.pdf [firstpage_image] =>[orig_patent_app_number] => 497016 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/497016
Unbalanced transmitter and receiver Mar 20, 1990 Issued
Array ( [id] => 2818260 [patent_doc_number] => 05157692 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-20 [patent_title] => 'System for controlling communication between parallel computers' [patent_app_type] => 1 [patent_app_number] => 7/495987 [patent_app_country] => US [patent_app_date] => 1990-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 34 [patent_no_of_words] => 12401 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/157/05157692.pdf [firstpage_image] =>[orig_patent_app_number] => 495987 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/495987
System for controlling communication between parallel computers Mar 19, 1990 Issued
Array ( [id] => 2756062 [patent_doc_number] => 05003562 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-26 [patent_title] => 'Digital phase lock loop decoder' [patent_app_type] => 1 [patent_app_number] => 7/493546 [patent_app_country] => US [patent_app_date] => 1990-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 7100 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/003/05003562.pdf [firstpage_image] =>[orig_patent_app_number] => 493546 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/493546
Digital phase lock loop decoder Mar 13, 1990 Issued
Array ( [id] => 2859689 [patent_doc_number] => 05111482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'MSK signal detector' [patent_app_type] => 1 [patent_app_number] => 7/492626 [patent_app_country] => US [patent_app_date] => 1990-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 25 [patent_no_of_words] => 4678 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111482.pdf [firstpage_image] =>[orig_patent_app_number] => 492626 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/492626
MSK signal detector Mar 12, 1990 Issued
07/493017 TECHNIQUE FOR DETERMINING SIGNAL DISPERSION CHARACTERISTICS IN COMMUNICATIONS SYSTEMS Mar 12, 1990 Abandoned
Array ( [id] => 2745206 [patent_doc_number] => 05052021 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-24 [patent_title] => 'Digital signal decoding circuit and decoding method' [patent_app_type] => 1 [patent_app_number] => 7/492947 [patent_app_country] => US [patent_app_date] => 1990-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 15098 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/052/05052021.pdf [firstpage_image] =>[orig_patent_app_number] => 492947 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/492947
Digital signal decoding circuit and decoding method Mar 12, 1990 Issued
Array ( [id] => 2814644 [patent_doc_number] => 05125008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-23 [patent_title] => 'Method and apparatus for autoranging, quadrature signal generation, digital phase reference, and calibration in a high speed RF measurement receiver' [patent_app_type] => 1 [patent_app_number] => 7/491186 [patent_app_country] => US [patent_app_date] => 1990-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11991 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/125/05125008.pdf [firstpage_image] =>[orig_patent_app_number] => 491186 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/491186
Method and apparatus for autoranging, quadrature signal generation, digital phase reference, and calibration in a high speed RF measurement receiver Mar 8, 1990 Issued
Array ( [id] => 2681274 [patent_doc_number] => 05048055 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Multi-data rate selectable equalizer' [patent_app_type] => 1 [patent_app_number] => 7/485206 [patent_app_country] => US [patent_app_date] => 1990-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1810 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/048/05048055.pdf [firstpage_image] =>[orig_patent_app_number] => 485206 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/485206
Multi-data rate selectable equalizer Feb 25, 1990 Issued
Array ( [id] => 2794202 [patent_doc_number] => 05164960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-17 [patent_title] => 'Medium attachment unit for use with twisted pair local area network' [patent_app_type] => 1 [patent_app_number] => 7/480426 [patent_app_country] => US [patent_app_date] => 1990-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 45 [patent_no_of_words] => 16236 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/164/05164960.pdf [firstpage_image] =>[orig_patent_app_number] => 480426 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/480426
Medium attachment unit for use with twisted pair local area network Feb 14, 1990 Issued
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