Search

Raj R. Gupta

Examiner (ID: 12575)

Most Active Art Unit
2829
Art Unit(s)
2829, 2893, 2814
Total Applications
829
Issued Applications
593
Pending Applications
52
Abandoned Applications
205

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4333327 [patent_doc_number] => 06317821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Virtual single-cycle execution in pipelined processors' [patent_app_type] => 1 [patent_app_number] => 9/080787 [patent_app_country] => US [patent_app_date] => 1998-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4303 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/317/06317821.pdf [firstpage_image] =>[orig_patent_app_number] => 080787 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/080787
Virtual single-cycle execution in pipelined processors May 17, 1998 Issued
Array ( [id] => 4280198 [patent_doc_number] => 06205545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Method and apparatus for using static branch predictions hints with dynamically translated code traces to improve performance' [patent_app_type] => 1 [patent_app_number] => 9/070585 [patent_app_country] => US [patent_app_date] => 1998-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4486 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/205/06205545.pdf [firstpage_image] =>[orig_patent_app_number] => 070585 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/070585
Method and apparatus for using static branch predictions hints with dynamically translated code traces to improve performance Apr 29, 1998 Issued
Array ( [id] => 4177492 [patent_doc_number] => 06105128 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Method and apparatus for dispatching instructions to execution units in waves' [patent_app_type] => 1 [patent_app_number] => 9/070076 [patent_app_country] => US [patent_app_date] => 1998-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4424 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/105/06105128.pdf [firstpage_image] =>[orig_patent_app_number] => 070076 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/070076
Method and apparatus for dispatching instructions to execution units in waves Apr 29, 1998 Issued
Array ( [id] => 4162577 [patent_doc_number] => 06032248 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Microcontroller including a single memory module having a data memory sector and a code memory sector and supporting simultaneous read/write access to both sectors' [patent_app_type] => 1 [patent_app_number] => 9/069884 [patent_app_country] => US [patent_app_date] => 1998-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 11863 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/032/06032248.pdf [firstpage_image] =>[orig_patent_app_number] => 069884 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/069884
Microcontroller including a single memory module having a data memory sector and a code memory sector and supporting simultaneous read/write access to both sectors Apr 28, 1998 Issued
Array ( [id] => 3997324 [patent_doc_number] => 05961638 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Branch prediction mechanism employing branch selectors to select a branch prediction' [patent_app_type] => 1 [patent_app_number] => 9/067990 [patent_app_country] => US [patent_app_date] => 1998-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14589 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/961/05961638.pdf [firstpage_image] =>[orig_patent_app_number] => 067990 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/067990
Branch prediction mechanism employing branch selectors to select a branch prediction Apr 28, 1998 Issued
Array ( [id] => 4104004 [patent_doc_number] => 06026487 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Computer program product and method for efficiently selecting one action from among alternative actions' [patent_app_type] => 1 [patent_app_number] => 9/069006 [patent_app_country] => US [patent_app_date] => 1998-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5757 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026487.pdf [firstpage_image] =>[orig_patent_app_number] => 069006 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/069006
Computer program product and method for efficiently selecting one action from among alternative actions Apr 27, 1998 Issued
Array ( [id] => 4121213 [patent_doc_number] => 06023737 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Multi-stage pipelined data coalescing for improved frequency operation' [patent_app_type] => 1 [patent_app_number] => 9/066014 [patent_app_country] => US [patent_app_date] => 1998-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3678 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023737.pdf [firstpage_image] =>[orig_patent_app_number] => 066014 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/066014
Multi-stage pipelined data coalescing for improved frequency operation Apr 23, 1998 Issued
Array ( [id] => 4371260 [patent_doc_number] => 06216215 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Method and apparatus for senior loads' [patent_app_type] => 1 [patent_app_number] => 9/053932 [patent_app_country] => US [patent_app_date] => 1998-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 9086 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/216/06216215.pdf [firstpage_image] =>[orig_patent_app_number] => 053932 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/053932
Method and apparatus for senior loads Apr 1, 1998 Issued
Array ( [id] => 4178017 [patent_doc_number] => 06108773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Apparatus and method for branch target address calculation during instruction decode' [patent_app_type] => 1 [patent_app_number] => 9/052624 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8716 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108773.pdf [firstpage_image] =>[orig_patent_app_number] => 052624 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/052624
Apparatus and method for branch target address calculation during instruction decode Mar 30, 1998 Issued
Array ( [id] => 4195248 [patent_doc_number] => 06085312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Method and apparatus for handling imprecise exceptions' [patent_app_type] => 1 [patent_app_number] => 9/052994 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5573 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/085/06085312.pdf [firstpage_image] =>[orig_patent_app_number] => 052994 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/052994
Method and apparatus for handling imprecise exceptions Mar 30, 1998 Issued
Array ( [id] => 7613831 [patent_doc_number] => 06898700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-24 [patent_title] => 'Efficient saving and restoring state in task switching' [patent_app_type] => utility [patent_app_number] => 09/053398 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3894 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/898/06898700.pdf [firstpage_image] =>[orig_patent_app_number] => 09053398 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/053398
Efficient saving and restoring state in task switching Mar 30, 1998 Issued
Array ( [id] => 4224127 [patent_doc_number] => 06079010 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Multiple machine view execution in a computer system' [patent_app_type] => 1 [patent_app_number] => 9/052671 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3886 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/079/06079010.pdf [firstpage_image] =>[orig_patent_app_number] => 052671 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/052671
Multiple machine view execution in a computer system Mar 30, 1998 Issued
Array ( [id] => 1495397 [patent_doc_number] => 06418529 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Apparatus and method for performing intra-add operation' [patent_app_type] => B1 [patent_app_number] => 09/053401 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 4064 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/418/06418529.pdf [firstpage_image] =>[orig_patent_app_number] => 09053401 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/053401
Apparatus and method for performing intra-add operation Mar 30, 1998 Issued
Array ( [id] => 4257153 [patent_doc_number] => 06081886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Holding mechanism for changing operation modes in a pipelined computer' [patent_app_type] => 1 [patent_app_number] => 9/049058 [patent_app_country] => US [patent_app_date] => 1998-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6145 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081886.pdf [firstpage_image] =>[orig_patent_app_number] => 049058 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/049058
Holding mechanism for changing operation modes in a pipelined computer Mar 26, 1998 Issued
Array ( [id] => 4192759 [patent_doc_number] => 06141746 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Information processor' [patent_app_type] => 1 [patent_app_number] => 9/040324 [patent_app_country] => US [patent_app_date] => 1998-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 11965 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/141/06141746.pdf [firstpage_image] =>[orig_patent_app_number] => 040324 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/040324
Information processor Mar 17, 1998 Issued
Array ( [id] => 4114621 [patent_doc_number] => 06049860 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Pipelined floating point stores' [patent_app_type] => 1 [patent_app_number] => 9/025939 [patent_app_country] => US [patent_app_date] => 1998-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2572 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 562 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049860.pdf [firstpage_image] =>[orig_patent_app_number] => 025939 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/025939
Pipelined floating point stores Feb 18, 1998 Issued
09/120275 FAST EMPTY STATE INSTRUCTION FOR A MICROPROCESSOR INCLUDING MULTIPLE REGISTER FILES MAPPED TO THE SAME LOGICAL STORAGE Feb 12, 1998 Abandoned
Array ( [id] => 4022455 [patent_doc_number] => 05987601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Zero overhead computer interrupts with task switching' [patent_app_type] => 1 [patent_app_number] => 9/023333 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 7 [patent_no_of_words] => 4319 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/987/05987601.pdf [firstpage_image] =>[orig_patent_app_number] => 023333 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023333
Zero overhead computer interrupts with task switching Feb 12, 1998 Issued
Array ( [id] => 4151929 [patent_doc_number] => 06035386 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Program counter update mechanism' [patent_app_type] => 1 [patent_app_number] => 9/037436 [patent_app_country] => US [patent_app_date] => 1998-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10351 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/035/06035386.pdf [firstpage_image] =>[orig_patent_app_number] => 037436 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/037436
Program counter update mechanism Feb 9, 1998 Issued
Array ( [id] => 4085410 [patent_doc_number] => 06009510 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Method and apparatus for improved aligned/misaligned data load from cache' [patent_app_type] => 1 [patent_app_number] => 9/020269 [patent_app_country] => US [patent_app_date] => 1998-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7651 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009510.pdf [firstpage_image] =>[orig_patent_app_number] => 020269 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/020269
Method and apparatus for improved aligned/misaligned data load from cache Feb 5, 1998 Issued
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