Raj R. Gupta

Array ( [id] => 3894493 [patent_doc_number] => 05764970 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Method and apparatus for supporting speculative branch and link/branch on count instructions' [patent_app_type] => 1 [patent_app_number] => 8/560614 [patent_app_country] => US [patent_app_date] => 1995-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4486 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764970.pdf [firstpage_image] =>[orig_patent_app_number] => 560614 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3695525 [patent_doc_number] => 05634103 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Method and system for minimizing branch misprediction penalties within a processor' [patent_app_type] => 1 [patent_app_number] => 8/555819 [patent_app_country] => US [patent_app_date] => 1995-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3606 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/634/05634103.pdf [firstpage_image] =>[orig_patent_app_number] => 555819 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3758382 [patent_doc_number] => 05754806 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Memory table look-up device and method' [patent_app_type] => 1 [patent_app_number] => 8/552217 [patent_app_country] => US [patent_app_date] => 1995-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5355 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754806.pdf [firstpage_image] =>[orig_patent_app_number] => 552217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3992777 [patent_doc_number] => 05918030 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Device for executing a program of instructions' [patent_app_type] => 1 [patent_app_number] => 8/548206 [patent_app_country] => US [patent_app_date] => 1995-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 7676 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918030.pdf [firstpage_image] =>[orig_patent_app_number] => 548206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4260459 [patent_doc_number] => 06167503 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Register and instruction controller for superscalar processor' [patent_app_type] => 1 [patent_app_number] => 8/552517 [patent_app_country] => US [patent_app_date] => 1995-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5537 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/167/06167503.pdf [firstpage_image] =>[orig_patent_app_number] => 552517 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3997785 [patent_doc_number] => 05949971 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Method and system for performance monitoring through identification of frequency and length of time of execution of serialization instructions in a processing system' [patent_app_type] => 1 [patent_app_number] => 8/537586 [patent_app_country] => US [patent_app_date] => 1995-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 12735 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/949/05949971.pdf [firstpage_image] =>[orig_patent_app_number] => 537586 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3625915 [patent_doc_number] => 05535332 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-09 [patent_title] => 'Shared-data alteration status management apparatus' [patent_app_type] => 1 [patent_app_number] => 8/533941 [patent_app_country] => US [patent_app_date] => 1995-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 5060 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/535/05535332.pdf [firstpage_image] =>[orig_patent_app_number] => 533941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3987706 [patent_doc_number] => 05922067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Microprocessor executing instruction having operand field including portion used as part of operation code' [patent_app_type] => 1 [patent_app_number] => 8/529606 [patent_app_country] => US [patent_app_date] => 1995-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2075 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/922/05922067.pdf [firstpage_image] =>[orig_patent_app_number] => 529606 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3954999 [patent_doc_number] => 05900025 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Processor having a hierarchical control register file and methods for operating the same' [patent_app_type] => 1 [patent_app_number] => 8/528509 [patent_app_country] => US [patent_app_date] => 1995-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 34 [patent_no_of_words] => 9132 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/900/05900025.pdf [firstpage_image] =>[orig_patent_app_number] => 528509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3915338 [patent_doc_number] => 05944804 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Super pipelined architecture for transmit flow in a network controller' [patent_app_type] => 1 [patent_app_number] => 8/526714 [patent_app_country] => US [patent_app_date] => 1995-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5197 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/944/05944804.pdf [firstpage_image] =>[orig_patent_app_number] => 526714 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3639892 [patent_doc_number] => 05621896 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-15 [patent_title] => 'Data processor with unified store queue permitting hit under miss memory accesses' [patent_app_type] => 1 [patent_app_number] => 8/523313 [patent_app_country] => US [patent_app_date] => 1995-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 6062 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/621/05621896.pdf [firstpage_image] =>[orig_patent_app_number] => 523313 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3760243 [patent_doc_number] => 05717871 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Crossbar switch with input/output buffers having multiplexed control inputs' [patent_app_type] => 1 [patent_app_number] => 8/516319 [patent_app_country] => US [patent_app_date] => 1995-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6259 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717871.pdf [firstpage_image] =>[orig_patent_app_number] => 516319 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3787585 [patent_doc_number] => 05774653 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'High-throughput data buffer' [patent_app_type] => 1 [patent_app_number] => 8/506019 [patent_app_country] => US [patent_app_date] => 1995-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6866 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/774/05774653.pdf [firstpage_image] =>[orig_patent_app_number] => 506019 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3636717 [patent_doc_number] => 05603014 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-11 [patent_title] => 'Protected mode simulation of a real mode interupt based programming interface in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/506323 [patent_app_country] => US [patent_app_date] => 1995-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5382 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/603/05603014.pdf [firstpage_image] =>[orig_patent_app_number] => 506323 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3878100 [patent_doc_number] => 05793973 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Method and system for opportunistic broadcasting of data' [patent_app_type] => 1 [patent_app_number] => 8/502706 [patent_app_country] => US [patent_app_date] => 1995-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6571 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793973.pdf [firstpage_image] =>[orig_patent_app_number] => 502706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3836309 [patent_doc_number] => 05790823 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Operand prefetch table' [patent_app_type] => 1 [patent_app_number] => 8/502115 [patent_app_country] => US [patent_app_date] => 1995-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 13196 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790823.pdf [firstpage_image] =>[orig_patent_app_number] => 502115 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3547478 [patent_doc_number] => 05557751 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Method and apparatus for serial data communications using FIFO buffers' [patent_app_type] => 1 [patent_app_number] => 8/501704 [patent_app_country] => US [patent_app_date] => 1995-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8271 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 436 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557751.pdf [firstpage_image] =>[orig_patent_app_number] => 501704 [rel_patent_id] =>[rel_patent_doc_number] =>)