Search

Raj R. Gupta

Examiner (ID: 12575, Phone: (571)270-5707 , Office: P/2829 )

Most Active Art Unit
2829
Art Unit(s)
2829, 2893, 2814
Total Applications
829
Issued Applications
593
Pending Applications
52
Abandoned Applications
205

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3064951 [patent_doc_number] => 05307479 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-26 [patent_title] => 'Method for multi-domain and multi-dimensional concurrent simulation using a digital computer' [patent_app_type] => 1 [patent_app_number] => 8/024878 [patent_app_country] => US [patent_app_date] => 1993-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3605 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/307/05307479.pdf [firstpage_image] =>[orig_patent_app_number] => 024878 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/024878
Method for multi-domain and multi-dimensional concurrent simulation using a digital computer Feb 28, 1993 Issued
Array ( [id] => 3894321 [patent_doc_number] => 05729752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Network connection scheme' [patent_app_type] => 1 [patent_app_number] => 8/019499 [patent_app_country] => US [patent_app_date] => 1993-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1872 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729752.pdf [firstpage_image] =>[orig_patent_app_number] => 019499 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/019499
Network connection scheme Feb 18, 1993 Issued
Array ( [id] => 3437721 [patent_doc_number] => 05404471 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-04 [patent_title] => 'Method and apparatus for switching address generation modes in CPU having plural address generation modes' [patent_app_type] => 1 [patent_app_number] => 8/014892 [patent_app_country] => US [patent_app_date] => 1993-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2784 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/404/05404471.pdf [firstpage_image] =>[orig_patent_app_number] => 014892 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/014892
Method and apparatus for switching address generation modes in CPU having plural address generation modes Feb 7, 1993 Issued
08/015000 ARRANGEMENT OF DETECTING UNEXPECTED CONTROL TRANSFER IN A DIGITAL DATA PROCESSING SYSTEM Feb 7, 1993 Abandoned
Array ( [id] => 3604545 [patent_doc_number] => RE035448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-11 [patent_title] => 'Method for establishing current terminal addresses for system users processing distributed application programs in an SNA LU 6.2 network environment' [patent_app_type] => 2 [patent_app_number] => 8/013507 [patent_app_country] => US [patent_app_date] => 1993-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 8030 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 454 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/035/RE035448.pdf [firstpage_image] =>[orig_patent_app_number] => 013507 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/013507
Method for establishing current terminal addresses for system users processing distributed application programs in an SNA LU 6.2 network environment Feb 3, 1993 Issued
Array ( [id] => 3634607 [patent_doc_number] => 05689694 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Data processing apparatus providing bus attribute information for system debugging' [patent_app_type] => 1 [patent_app_number] => 8/010016 [patent_app_country] => US [patent_app_date] => 1993-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 7318 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689694.pdf [firstpage_image] =>[orig_patent_app_number] => 010016 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/010016
Data processing apparatus providing bus attribute information for system debugging Jan 26, 1993 Issued
Array ( [id] => 3126257 [patent_doc_number] => 05414842 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-09 [patent_title] => 'External sorting using virtual storage as a work device' [patent_app_type] => 1 [patent_app_number] => 8/008048 [patent_app_country] => US [patent_app_date] => 1993-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3285 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/414/05414842.pdf [firstpage_image] =>[orig_patent_app_number] => 008048 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/008048
External sorting using virtual storage as a work device Jan 21, 1993 Issued
Array ( [id] => 3085118 [patent_doc_number] => 05365526 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-15 [patent_title] => 'Trace system for an I/O channel' [patent_app_type] => 1 [patent_app_number] => 7/993100 [patent_app_country] => US [patent_app_date] => 1992-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3997 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/365/05365526.pdf [firstpage_image] =>[orig_patent_app_number] => 993100 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/993100
Trace system for an I/O channel Dec 17, 1992 Issued
07/995409 INTER-PROGRAM COMMUNICATION AND SCHEDULING METHOD FOR PERSONAL COMPUTERS Dec 17, 1992 Abandoned
Array ( [id] => 3745401 [patent_doc_number] => 05694578 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-02 [patent_title] => 'Computer-implemented method and apparatus for converting data according to a selected data transformation' [patent_app_type] => 1 [patent_app_number] => 7/993016 [patent_app_country] => US [patent_app_date] => 1992-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5664 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 367 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/694/05694578.pdf [firstpage_image] =>[orig_patent_app_number] => 993016 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/993016
Computer-implemented method and apparatus for converting data according to a selected data transformation Dec 17, 1992 Issued
07/985731 DISK EMULATION SYSTEM Nov 30, 1992 Abandoned
Array ( [id] => 3008005 [patent_doc_number] => 05367684 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-22 [patent_title] => 'Register allocation using an improved register candidate usage matrix' [patent_app_type] => 1 [patent_app_number] => 7/983403 [patent_app_country] => US [patent_app_date] => 1992-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3153 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/367/05367684.pdf [firstpage_image] =>[orig_patent_app_number] => 983403 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/983403
Register allocation using an improved register candidate usage matrix Nov 29, 1992 Issued
Array ( [id] => 3007373 [patent_doc_number] => 05367651 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-22 [patent_title] => 'Integrated register allocation, instruction scheduling, instruction reduction and loop unrolling' [patent_app_type] => 1 [patent_app_number] => 7/982962 [patent_app_country] => US [patent_app_date] => 1992-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4743 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/367/05367651.pdf [firstpage_image] =>[orig_patent_app_number] => 982962 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/982962
Integrated register allocation, instruction scheduling, instruction reduction and loop unrolling Nov 29, 1992 Issued
Array ( [id] => 3438200 [patent_doc_number] => 05416905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-16 [patent_title] => 'Method of program management for multiple computer system' [patent_app_type] => 1 [patent_app_number] => 7/979433 [patent_app_country] => US [patent_app_date] => 1992-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2252 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/416/05416905.pdf [firstpage_image] =>[orig_patent_app_number] => 979433 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/979433
Method of program management for multiple computer system Nov 19, 1992 Issued
07/976899 GLOBAL REGISTERS FOR A MULTIPROCESSOR SYSTEM Nov 15, 1992 Abandoned
07/975248 PAST-HISTORY FILTERED BRANCH PREDICTION Nov 11, 1992 Abandoned
07/975450 MULTIPLE BLOCK LINE PREDICTION Nov 11, 1992 Abandoned
Array ( [id] => 3108463 [patent_doc_number] => 05291615 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-01 [patent_title] => 'Instruction pipeline microprocessor' [patent_app_type] => 1 [patent_app_number] => 7/974328 [patent_app_country] => US [patent_app_date] => 1992-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2655 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/291/05291615.pdf [firstpage_image] =>[orig_patent_app_number] => 974328 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/974328
Instruction pipeline microprocessor Nov 9, 1992 Issued
Array ( [id] => 3132703 [patent_doc_number] => 05450554 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-12 [patent_title] => 'Apparatus for detecting possibility of parallel processing and method thereof and a program translation apparatus utilized therein' [patent_app_type] => 1 [patent_app_number] => 7/981002 [patent_app_country] => US [patent_app_date] => 1992-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9311 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/450/05450554.pdf [firstpage_image] =>[orig_patent_app_number] => 981002 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/981002
Apparatus for detecting possibility of parallel processing and method thereof and a program translation apparatus utilized therein Nov 9, 1992 Issued
Array ( [id] => 3501374 [patent_doc_number] => 05471591 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-28 [patent_title] => 'Combined write-operand queue and read-after-write dependency scoreboard' [patent_app_type] => 1 [patent_app_number] => 7/969126 [patent_app_country] => US [patent_app_date] => 1992-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 33 [patent_no_of_words] => 35250 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/471/05471591.pdf [firstpage_image] =>[orig_patent_app_number] => 969126 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/969126
Combined write-operand queue and read-after-write dependency scoreboard Oct 29, 1992 Issued
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