Search

Raj R. Gupta

Examiner (ID: 12575, Phone: (571)270-5707 , Office: P/2829 )

Most Active Art Unit
2829
Art Unit(s)
2829, 2893, 2814
Total Applications
829
Issued Applications
593
Pending Applications
52
Abandoned Applications
205

Applications

Application numberTitle of the applicationFiling DateStatus
07/566791 CONCURRENT ARBITRATION SYSTEM AND METHOD FOR BUS CONTROL Aug 12, 1990 Abandoned
Array ( [id] => 2725212 [patent_doc_number] => 05053988 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Data processing apparatus' [patent_app_type] => 1 [patent_app_number] => 7/563817 [patent_app_country] => US [patent_app_date] => 1990-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2605 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/053/05053988.pdf [firstpage_image] =>[orig_patent_app_number] => 563817 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/563817
Data processing apparatus Aug 5, 1990 Issued
Array ( [id] => 2946584 [patent_doc_number] => 05230043 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-20 [patent_title] => 'Arrangement for diagnosing the cause of communication interruption between two CPUS' [patent_app_type] => 1 [patent_app_number] => 7/560832 [patent_app_country] => US [patent_app_date] => 1990-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2982 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/230/05230043.pdf [firstpage_image] =>[orig_patent_app_number] => 560832 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/560832
Arrangement for diagnosing the cause of communication interruption between two CPUS Jul 30, 1990 Issued
Array ( [id] => 3502421 [patent_doc_number] => 05440693 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-08 [patent_title] => 'Personal computer with drive identification' [patent_app_type] => 1 [patent_app_number] => 7/555326 [patent_app_country] => US [patent_app_date] => 1990-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3704 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/440/05440693.pdf [firstpage_image] =>[orig_patent_app_number] => 555326 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/555326
Personal computer with drive identification Jul 18, 1990 Issued
Array ( [id] => 2946877 [patent_doc_number] => 05230059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-20 [patent_title] => 'Software - configurable adaptive computer interface' [patent_app_type] => 1 [patent_app_number] => 7/554001 [patent_app_country] => US [patent_app_date] => 1990-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6467 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/230/05230059.pdf [firstpage_image] =>[orig_patent_app_number] => 554001 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/554001
Software - configurable adaptive computer interface Jul 15, 1990 Issued
07/551231 BIT FIELD LOGIC OPERATION UNIT Jul 10, 1990 Abandoned
Array ( [id] => 4424802 [patent_doc_number] => 06230255 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Communications processor for voice band telecommunications' [patent_app_type] => 1 [patent_app_number] => 7/548709 [patent_app_country] => US [patent_app_date] => 1990-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 9832 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/230/06230255.pdf [firstpage_image] =>[orig_patent_app_number] => 548709 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/548709
Communications processor for voice band telecommunications Jul 5, 1990 Issued
Array ( [id] => 2889179 [patent_doc_number] => 05185887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-09 [patent_title] => 'Database generation management method and system' [patent_app_type] => 1 [patent_app_number] => 7/547512 [patent_app_country] => US [patent_app_date] => 1990-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6046 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/185/05185887.pdf [firstpage_image] =>[orig_patent_app_number] => 547512 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/547512
Database generation management method and system Jul 1, 1990 Issued
07/547603 HIGH-PERFORMANCE MULTI-PROCESSOR HAVING FLOATING POINT UNIT Jun 28, 1990 Abandoned
Array ( [id] => 2951528 [patent_doc_number] => 05261077 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-09 [patent_title] => 'Configurable data path arrangement for resolving data type incompatibility' [patent_app_type] => 1 [patent_app_number] => 7/546507 [patent_app_country] => US [patent_app_date] => 1990-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2632 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/261/05261077.pdf [firstpage_image] =>[orig_patent_app_number] => 546507 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/546507
Configurable data path arrangement for resolving data type incompatibility Jun 28, 1990 Issued
07/546048 COMMON AGENT COMPUTER MANAGEMENT SYSTEM AND METHOD Jun 27, 1990 Abandoned
07/540886 REDUCING THE EFFECT OF PROCESSOR BLOCKING Jun 19, 1990 Abandoned
Array ( [id] => 2904879 [patent_doc_number] => 05210837 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-11 [patent_title] => 'Methods and apparatus for transforming machine language program control into high-level language constructs by manipulating graphical program representations' [patent_app_type] => 1 [patent_app_number] => 7/538906 [patent_app_country] => US [patent_app_date] => 1990-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 10894 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/210/05210837.pdf [firstpage_image] =>[orig_patent_app_number] => 538906 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/538906
Methods and apparatus for transforming machine language program control into high-level language constructs by manipulating graphical program representations Jun 14, 1990 Issued
07/537583 HARDWARE ASSISTED KEYBOARD SCANNER Jun 13, 1990 Abandoned
Array ( [id] => 2795642 [patent_doc_number] => 05165038 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-17 [patent_title] => 'Global registers for a multiprocessor system' [patent_app_type] => 1 [patent_app_number] => 7/536198 [patent_app_country] => US [patent_app_date] => 1990-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6728 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/165/05165038.pdf [firstpage_image] =>[orig_patent_app_number] => 536198 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/536198
Global registers for a multiprocessor system Jun 10, 1990 Issued
Array ( [id] => 2831998 [patent_doc_number] => 05168547 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-01 [patent_title] => 'Distributed architecture for input/output for a multiprocessor system' [patent_app_type] => 1 [patent_app_number] => 7/536182 [patent_app_country] => US [patent_app_date] => 1990-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 33 [patent_no_of_words] => 14073 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/168/05168547.pdf [firstpage_image] =>[orig_patent_app_number] => 536182 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/536182
Distributed architecture for input/output for a multiprocessor system Jun 10, 1990 Issued
Array ( [id] => 3454695 [patent_doc_number] => 05430884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-04 [patent_title] => 'Scalar/vector processor' [patent_app_type] => 1 [patent_app_number] => 7/536409 [patent_app_country] => US [patent_app_date] => 1990-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 34 [patent_no_of_words] => 21284 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/430/05430884.pdf [firstpage_image] =>[orig_patent_app_number] => 536409 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/536409
Scalar/vector processor Jun 10, 1990 Issued
Array ( [id] => 2832458 [patent_doc_number] => 05168570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-01 [patent_title] => 'Method and apparatus for a multiple request toggling priority system' [patent_app_type] => 1 [patent_app_number] => 7/536417 [patent_app_country] => US [patent_app_date] => 1990-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4884 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/168/05168570.pdf [firstpage_image] =>[orig_patent_app_number] => 536417 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/536417
Method and apparatus for a multiple request toggling priority system Jun 10, 1990 Issued
Array ( [id] => 2901637 [patent_doc_number] => 05239629 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-24 [patent_title] => 'Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system' [patent_app_type] => 1 [patent_app_number] => 7/536192 [patent_app_country] => US [patent_app_date] => 1990-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 4591 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/239/05239629.pdf [firstpage_image] =>[orig_patent_app_number] => 536192 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/536192
Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system Jun 10, 1990 Issued
Array ( [id] => 2843537 [patent_doc_number] => 05175862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-29 [patent_title] => 'Method and apparatus for a special purpose arithmetic boolean unit' [patent_app_type] => 1 [patent_app_number] => 7/536197 [patent_app_country] => US [patent_app_date] => 1990-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 3575 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/175/05175862.pdf [firstpage_image] =>[orig_patent_app_number] => 536197 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/536197
Method and apparatus for a special purpose arithmetic boolean unit Jun 10, 1990 Issued
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