Raj R. Gupta

Array ( [id] => 2928316 [patent_doc_number] => 05179713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-12 [patent_title] => 'Apparatus for allowing external control of local bus read using zero wait stats input of combined I/O and DRAM controller' [patent_app_type] => 1 [patent_app_number] => 7/533977 [patent_app_country] => US [patent_app_date] => 1990-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1876 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/179/05179713.pdf [firstpage_image] =>[orig_patent_app_number] => 533977 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2741556 [patent_doc_number] => 05032982 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-16 [patent_title] => 'Device for timing interrupt acknowledge cycles' [patent_app_type] => 1 [patent_app_number] => 7/520850 [patent_app_country] => US [patent_app_date] => 1990-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3806 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/032/05032982.pdf [firstpage_image] =>[orig_patent_app_number] => 520850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3107253 [patent_doc_number] => 05313615 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-17 [patent_title] => 'Block diagram simulator using a library for generation of a computer program' [patent_app_type] => 1 [patent_app_number] => 7/514725 [patent_app_country] => US [patent_app_date] => 1990-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 78 [patent_figures_cnt] => 91 [patent_no_of_words] => 50547 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 407 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/313/05313615.pdf [firstpage_image] =>[orig_patent_app_number] => 514725 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2752351 [patent_doc_number] => 05029076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-02 [patent_title] => 'Apparatus and method for providing a settling time cycle for a system bus in a data processing system' [patent_app_type] => 1 [patent_app_number] => 7/512571 [patent_app_country] => US [patent_app_date] => 1990-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3395 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/029/05029076.pdf [firstpage_image] =>[orig_patent_app_number] => 512571 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2844023 [patent_doc_number] => 05129082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Method and apparatus for searching database component files to retrieve information from modified files' [patent_app_type] => 1 [patent_app_number] => 7/500141 [patent_app_country] => US [patent_app_date] => 1990-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 9409 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 411 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/129/05129082.pdf [firstpage_image] =>[orig_patent_app_number] => 500141 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2787901 [patent_doc_number] => 05151996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-29 [patent_title] => 'Multi-dimensional message transfer router' [patent_app_type] => 1 [patent_app_number] => 7/497003 [patent_app_country] => US [patent_app_date] => 1990-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 27270 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/151/05151996.pdf [firstpage_image] =>[orig_patent_app_number] => 497003 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2826563 [patent_doc_number] => 05123109 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-16 [patent_title] => 'Parallel processor including a processor array with plural data transfer arrangements including (1) a global router and (2) a proximate-neighbor transfer system' [patent_app_type] => 1 [patent_app_number] => 7/489179 [patent_app_country] => US [patent_app_date] => 1990-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 27179 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/123/05123109.pdf [firstpage_image] =>[orig_patent_app_number] => 489179 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2787989 [patent_doc_number] => 05152000 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-29 [patent_title] => 'Array communications arrangement for parallel processor' [patent_app_type] => 1 [patent_app_number] => 7/478082 [patent_app_country] => US [patent_app_date] => 1990-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 27245 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 381 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/152/05152000.pdf [firstpage_image] =>[orig_patent_app_number] => 478082 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2930926 [patent_doc_number] => 05206941 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-27 [patent_title] => 'Fast store-through cache memory' [patent_app_type] => 1 [patent_app_number] => 7/468048 [patent_app_country] => US [patent_app_date] => 1990-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5894 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/206/05206941.pdf [firstpage_image] =>[orig_patent_app_number] => 468048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3032699 [patent_doc_number] => 05303361 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-12 [patent_title] => 'Search and retrieval system' [patent_app_type] => 1 [patent_app_number] => 7/466750 [patent_app_country] => US [patent_app_date] => 1990-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6527 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/303/05303361.pdf [firstpage_image] =>[orig_patent_app_number] => 466750 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2998708 [patent_doc_number] => 05251306 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-05 [patent_title] => 'Apparatus for controlling execution of a program in a computing device' [patent_app_type] => 1 [patent_app_number] => 7/465808 [patent_app_country] => US [patent_app_date] => 1990-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7819 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/251/05251306.pdf [firstpage_image] =>[orig_patent_app_number] => 465808 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2715835 [patent_doc_number] => 04992974 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-12 [patent_title] => 'Data processing device for processing a combination of data items' [patent_app_type] => 1 [patent_app_number] => 7/462949 [patent_app_country] => US [patent_app_date] => 1990-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2244 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/992/04992974.pdf [firstpage_image] =>[orig_patent_app_number] => 462949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2907490 [patent_doc_number] => 05241628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-31 [patent_title] => 'Method wherein source arbitrates for bus using arbitration number of destination' [patent_app_type] => 1 [patent_app_number] => 7/461045 [patent_app_country] => US [patent_app_date] => 1990-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3818 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/241/05241628.pdf [firstpage_image] =>[orig_patent_app_number] => 461045 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2946577 [patent_doc_number] => 05197130 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-23 [patent_title] => 'Cluster architecture for a highly parallel scalar/vector multiprocessor system' [patent_app_type] => 1 [patent_app_number] => 7/459083 [patent_app_country] => US [patent_app_date] => 1989-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 46 [patent_no_of_words] => 19854 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/197/05197130.pdf [firstpage_image] =>[orig_patent_app_number] => 459083 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2742956 [patent_doc_number] => 05077662 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-31 [patent_title] => 'Microprocessor control system having expanded interrupt capabilities' [patent_app_type] => 1 [patent_app_number] => 7/456033 [patent_app_country] => US [patent_app_date] => 1989-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2765 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/077/05077662.pdf [firstpage_image] =>[orig_patent_app_number] => 456033 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2929932 [patent_doc_number] => 05193165 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-09 [patent_title] => 'Memory card refresh buffer' [patent_app_type] => 1 [patent_app_number] => 7/450139 [patent_app_country] => US [patent_app_date] => 1989-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2937 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/193/05193165.pdf [firstpage_image] =>[orig_patent_app_number] => 450139 [rel_patent_id] =>[rel_patent_doc_number] =>)