| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_doc_number] => 05089990
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[patent_kind] => NA
[patent_issue_date] => 1992-02-18
[patent_title] => 'Word processor with column layout function'
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[patent_app_number] => 7/296363
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[patent_app_date] => 1989-01-09
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/296363 | Word processor with column layout function | Jan 8, 1989 | Issued |
| 07/292189 | TWO STAGE CACHE MEMORY SYSTEM AND METHOD | Dec 29, 1988 | Abandoned |
| 07/291805 | STORE BUFFER APPARATUS IN A MULTIPROCESSOR COMPUTER SYSTEM | Dec 28, 1988 | Abandoned |
| 07/291888 | CACHE BYPASS APPARATUS | Dec 28, 1988 | Abandoned |
Array
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[patent_doc_number] => 04992932
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[patent_kind] => NA
[patent_issue_date] => 1991-02-12
[patent_title] => 'Data processing device with data buffer control'
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[firstpage_image] =>[orig_patent_app_number] => 290335
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/290335 | Data processing device with data buffer control | Dec 26, 1988 | Issued |
| 07/289202 | PIPELINE PROCESSOR WITH PREFETCH CIRCUIT | Dec 22, 1988 | Abandoned |
Array
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[id] => 2771170
[patent_doc_number] => RE034052
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-01
[patent_title] => 'Data processing system with CPU register to register data transfers overlapped with data transfer to and from main storage'
[patent_app_type] => 2
[patent_app_number] => 7/285827
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[firstpage_image] =>[orig_patent_app_number] => 285827
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/285827 | Data processing system with CPU register to register data transfers overlapped with data transfer to and from main storage | Dec 15, 1988 | Issued |
Array
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[id] => 2691987
[patent_doc_number] => 05046041
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-03
[patent_title] => 'Device for transmitting information between a plurality of elements of an automobile vehicle, and a central information processing unit'
[patent_app_type] => 1
[patent_app_number] => 7/284604
[patent_app_country] => US
[patent_app_date] => 1988-12-15
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[firstpage_image] =>[orig_patent_app_number] => 284604
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/284604 | Device for transmitting information between a plurality of elements of an automobile vehicle, and a central information processing unit | Dec 14, 1988 | Issued |
| 07/282540 | REFRESH CONTROL FOR DYNAMIC MEMORY IN MULTIPLE PROCESSOR SYSTEM | Dec 8, 1988 | Abandoned |
Array
(
[id] => 2667165
[patent_doc_number] => 04979102
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-12-18
[patent_title] => 'Microprocessor operable under direct connection to coprocessor'
[patent_app_type] => 1
[patent_app_number] => 7/279795
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/279795 | Microprocessor operable under direct connection to coprocessor | Dec 4, 1988 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/277949 | Processor system including a paging processor for controlling paging between a main storage and an extended storage | Nov 29, 1988 | Issued |
Array
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[id] => 2702641
[patent_doc_number] => 04996639
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-02-26
[patent_title] => 'Data processor including an A/D converter for converting a plurality of analog input channels into digital data'
[patent_app_type] => 1
[patent_app_number] => 7/276970
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/276970 | Data processor including an A/D converter for converting a plurality of analog input channels into digital data | Nov 27, 1988 | Issued |
Array
(
[id] => 2636382
[patent_doc_number] => 04951250
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-21
[patent_title] => 'Combined input/output circuit for a programmable controller'
[patent_app_type] => 1
[patent_app_number] => 7/272973
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[patent_app_date] => 1988-11-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/272973 | Combined input/output circuit for a programmable controller | Nov 17, 1988 | Issued |
Array
(
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[patent_issue_date] => 1990-02-20
[patent_title] => 'Method for controlling data transfer'
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[firstpage_image] =>[orig_patent_app_number] => 271381
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/271381 | Method for controlling data transfer | Nov 13, 1988 | Issued |
Array
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[id] => 2730541
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[patent_issue_date] => 1991-06-18
[patent_title] => 'Hardware implemented cache coherency protocol with duplicated distributed directories for high-performance multiprocessors'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/270324 | Hardware implemented cache coherency protocol with duplicated distributed directories for high-performance multiprocessors | Nov 13, 1988 | Issued |
Array
(
[id] => 2715116
[patent_doc_number] => 04992936
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-02-12
[patent_title] => 'Address translation method and apparatus therefor'
[patent_app_type] => 1
[patent_app_number] => 7/269058
[patent_app_country] => US
[patent_app_date] => 1988-11-09
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[firstpage_image] =>[orig_patent_app_number] => 269058
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/269058 | Address translation method and apparatus therefor | Nov 8, 1988 | Issued |
| 07/269171 | PROCESSING SYSTEM FOR BRANCH INSTRUCTION | Nov 8, 1988 | Abandoned |
Array
(
[id] => 2826370
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/264289 | Manipulation of time-ordered lists and instructions therefor | Oct 27, 1988 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/262574 | Quasi-fair arbitration scheme with default owner speedup | Oct 24, 1988 | Issued |