Raj R. Gupta

Array ( [id] => 2611836 [patent_doc_number] => 04949241 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-14 [patent_title] => 'Microcomputer system including a master processor and a slave processor synchronized by three control lines' [patent_app_type] => 1 [patent_app_number] => 7/260699 [patent_app_country] => US [patent_app_date] => 1988-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4718 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/949/04949241.pdf [firstpage_image] =>[orig_patent_app_number] => 260699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2835645 [patent_doc_number] => 05117351 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-26 [patent_title] => 'Object identifier generator for distributed computer system' [patent_app_type] => 1 [patent_app_number] => 7/260908 [patent_app_country] => US [patent_app_date] => 1988-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3322 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/117/05117351.pdf [firstpage_image] =>[orig_patent_app_number] => 260908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2646489 [patent_doc_number] => 04914584 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-03 [patent_title] => 'Rules and apparatus for an intermediate code memory that buffers code segments' [patent_app_type] => 1 [patent_app_number] => 7/258843 [patent_app_country] => US [patent_app_date] => 1988-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3874 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/914/04914584.pdf [firstpage_image] =>[orig_patent_app_number] => 258843 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2681691 [patent_doc_number] => 05027270 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-25 [patent_title] => 'Processor controlled interface with instruction streaming' [patent_app_type] => 1 [patent_app_number] => 7/255791 [patent_app_country] => US [patent_app_date] => 1988-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4107 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/027/05027270.pdf [firstpage_image] =>[orig_patent_app_number] => 255791 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2664208 [patent_doc_number] => 04972342 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-20 [patent_title] => 'Programmable priority branch circuit' [patent_app_type] => 1 [patent_app_number] => 7/254985 [patent_app_country] => US [patent_app_date] => 1988-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4033 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/972/04972342.pdf [firstpage_image] =>[orig_patent_app_number] => 254985 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2718108 [patent_doc_number] => 05041966 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-20 [patent_title] => 'Partially distributed method for clock synchronization' [patent_app_type] => 1 [patent_app_number] => 7/253478 [patent_app_country] => US [patent_app_date] => 1988-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 9094 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/041/05041966.pdf [firstpage_image] =>[orig_patent_app_number] => 253478 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2636856 [patent_doc_number] => 04907151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-06 [patent_title] => 'System and method for garbage collection with ambiguous roots' [patent_app_type] => 1 [patent_app_number] => 7/251554 [patent_app_country] => US [patent_app_date] => 1988-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 10385 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/907/04907151.pdf [firstpage_image] =>[orig_patent_app_number] => 251554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2705075 [patent_doc_number] => 04991089 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-05 [patent_title] => 'Method for establishing current terminal addresses for system users processing distributed application programs in an SNA LU 6.2 network environment' [patent_app_type] => 1 [patent_app_number] => 7/251279 [patent_app_country] => US [patent_app_date] => 1988-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 8028 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 454 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/991/04991089.pdf [firstpage_image] =>[orig_patent_app_number] => 251279 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2597973 [patent_doc_number] => 04959778 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-25 [patent_title] => 'Address space switching apparatus' [patent_app_type] => 1 [patent_app_number] => 7/251841 [patent_app_country] => US [patent_app_date] => 1988-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2475 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/959/04959778.pdf [firstpage_image] =>[orig_patent_app_number] => 251841 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2527477 [patent_doc_number] => 04855904 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-08 [patent_title] => 'Cache storage queue' [patent_app_type] => 1 [patent_app_number] => 7/225875 [patent_app_country] => US [patent_app_date] => 1988-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7837 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/855/04855904.pdf [firstpage_image] =>[orig_patent_app_number] => 225875 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2594250 [patent_doc_number] => 04926313 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-15 [patent_title] => 'Bifurcated register priority system' [patent_app_type] => 1 [patent_app_number] => 7/246510 [patent_app_country] => US [patent_app_date] => 1988-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4330 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/926/04926313.pdf [firstpage_image] =>[orig_patent_app_number] => 246510 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2717488 [patent_doc_number] => 05056008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-08 [patent_title] => 'Data processor having expanded operating functions' [patent_app_type] => 1 [patent_app_number] => 7/241442 [patent_app_country] => US [patent_app_date] => 1988-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2411 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/056/05056008.pdf [firstpage_image] =>[orig_patent_app_number] => 241442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2741518 [patent_doc_number] => 05032980 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-16 [patent_title] => 'Information processing system with instruction address saving function corresponding to priority levels of interruption information' [patent_app_type] => 1 [patent_app_number] => 7/241375 [patent_app_country] => US [patent_app_date] => 1988-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 9267 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 421 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/032/05032980.pdf [firstpage_image] =>[orig_patent_app_number] => 241375 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2730614 [patent_doc_number] => 05025369 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-18 [patent_title] => 'Computer system' [patent_app_type] => 1 [patent_app_number] => 7/236493 [patent_app_country] => US [patent_app_date] => 1988-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6784 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/025/05025369.pdf [firstpage_image] =>[orig_patent_app_number] => 236493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2483762 [patent_doc_number] => 04872111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-10-03 [patent_title] => 'Monolithic semi-custom IC having standard LSI sections and coupling gate array sections' [patent_app_type] => 1 [patent_app_number] => 7/233953 [patent_app_country] => US [patent_app_date] => 1988-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7835 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/872/04872111.pdf [firstpage_image] =>[orig_patent_app_number] => 233953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2681706 [patent_doc_number] => 04984151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-08 [patent_title] => 'Flexible, next-address generation microprogram sequencer' [patent_app_type] => 1 [patent_app_number] => 7/227452 [patent_app_country] => US [patent_app_date] => 1988-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 7786 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/984/04984151.pdf [firstpage_image] =>[orig_patent_app_number] => 227452 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2676734 [patent_doc_number] => 05070474 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-03 [patent_title] => 'Disk emulation system' [patent_app_type] => 1 [patent_app_number] => 7/224530 [patent_app_country] => US [patent_app_date] => 1988-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 75 [patent_figures_cnt] => 191 [patent_no_of_words] => 42719 [patent_no_of_claims] => 82 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/070/05070474.pdf [firstpage_image] =>[orig_patent_app_number] => 224530 [rel_patent_id] =>[rel_patent_doc_number] =>)