
Raj R. Gupta
Examiner (ID: 381, Phone: (571)270-5707 , Office: P/2829 )
| Most Active Art Unit | 2829 |
| Art Unit(s) | 2893, 2829, 2814 |
| Total Applications | 829 |
| Issued Applications | 596 |
| Pending Applications | 47 |
| Abandoned Applications | 206 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17886789
[patent_doc_number] => 20220302267
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/496300
[patent_app_country] => US
[patent_app_date] => 2021-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7825
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17496300
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/496300 | Semiconductor device and method of manufacturing the semiconductor device | Oct 6, 2021 | Issued |
Array
(
[id] => 17886841
[patent_doc_number] => 20220302319
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => THIN-FILM STRUCTURE, SEMICONDUCTOR ELEMENT INCLUDING THE THIN-FILM STRUCTURE, AND METHOD OF MANUFACTURING THE THIN-FILM STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/495457
[patent_app_country] => US
[patent_app_date] => 2021-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3996
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495457
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/495457 | THIN-FILM STRUCTURE, SEMICONDUCTOR ELEMENT INCLUDING THE THIN-FILM STRUCTURE, AND METHOD OF MANUFACTURING THE THIN-FILM STRUCTURE | Oct 5, 2021 | Abandoned |
Array
(
[id] => 19079662
[patent_doc_number] => 11949044
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-02
[patent_title] => Display device and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/494654
[patent_app_country] => US
[patent_app_date] => 2021-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 29
[patent_no_of_words] => 20052
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17494654
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/494654 | Display device and method of manufacturing the same | Oct 4, 2021 | Issued |
Array
(
[id] => 19316027
[patent_doc_number] => 12041864
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-16
[patent_title] => Method and device for storing free atoms, molecules and ions in a contact-less, albeit well-defined near surface arrangement
[patent_app_type] => utility
[patent_app_number] => 17/491726
[patent_app_country] => US
[patent_app_date] => 2021-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2940
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17491726
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/491726 | Method and device for storing free atoms, molecules and ions in a contact-less, albeit well-defined near surface arrangement | Sep 30, 2021 | Issued |
Array
(
[id] => 18874876
[patent_doc_number] => 11862699
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Semiconductor structure and method for manufacturing same
[patent_app_type] => utility
[patent_app_number] => 17/449483
[patent_app_country] => US
[patent_app_date] => 2021-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5139
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17449483
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/449483 | Semiconductor structure and method for manufacturing same | Sep 29, 2021 | Issued |
Array
(
[id] => 18286219
[patent_doc_number] => 20230101691
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-30
[patent_title] => TRANSISTOR DEVICE WITH BUFFERED DRAIN
[patent_app_type] => utility
[patent_app_number] => 17/489513
[patent_app_country] => US
[patent_app_date] => 2021-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10291
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17489513
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/489513 | Transistor device with buffered drain | Sep 28, 2021 | Issued |
Array
(
[id] => 17536895
[patent_doc_number] => 20220115504
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-14
[patent_title] => INTEGRATED CIRCUIT DEVICES AND METHODS OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/488825
[patent_app_country] => US
[patent_app_date] => 2021-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9510
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488825
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/488825 | Integrated circuit devices and methods of manufacturing the same | Sep 28, 2021 | Issued |
Array
(
[id] => 19079629
[patent_doc_number] => 11949010
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-02
[patent_title] => Metal oxide semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/480374
[patent_app_country] => US
[patent_app_date] => 2021-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 3032
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480374
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/480374 | Metal oxide semiconductor device and method for manufacturing the same | Sep 20, 2021 | Issued |
Array
(
[id] => 17599611
[patent_doc_number] => 20220149185
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-12
[patent_title] => METHOD FOR MAKING LDMOS DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/406444
[patent_app_country] => US
[patent_app_date] => 2021-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3357
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406444
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/406444 | METHOD FOR MAKING LDMOS DEVICE | Aug 18, 2021 | Abandoned |
Array
(
[id] => 17262775
[patent_doc_number] => 20210375760
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-02
[patent_title] => Metal Line Structure and Method
[patent_app_type] => utility
[patent_app_number] => 17/402897
[patent_app_country] => US
[patent_app_date] => 2021-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7067
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402897
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/402897 | Metal line structure and method | Aug 15, 2021 | Issued |
Array
(
[id] => 17217989
[patent_doc_number] => 20210351327
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-11
[patent_title] => LIGHT-SOURCE APPARATUS AND DISTANCE MEASUREMENT APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/382827
[patent_app_country] => US
[patent_app_date] => 2021-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4258
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382827
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/382827 | LIGHT-SOURCE APPARATUS AND DISTANCE MEASUREMENT APPARATUS | Jul 21, 2021 | Abandoned |
Array
(
[id] => 17464007
[patent_doc_number] => 20220077313
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-10
[patent_title] => POWER SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/378820
[patent_app_country] => US
[patent_app_date] => 2021-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4284
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17378820
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/378820 | Power semiconductor device | Jul 18, 2021 | Issued |
Array
(
[id] => 18081311
[patent_doc_number] => 20220406923
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-22
[patent_title] => BILAYER METAL DICHALCOGENIDES, SYNTHESES THEREOF, AND USES THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/350384
[patent_app_country] => US
[patent_app_date] => 2021-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11600
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350384
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/350384 | BILAYER METAL DICHALCOGENIDES, SYNTHESES THEREOF, AND USES THEREOF | Jun 16, 2021 | Pending |
Array
(
[id] => 17145363
[patent_doc_number] => 20210313376
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => STACKED SUBSTRATE STRUCTURE WITH INTER-TIER INTERCONNECTION
[patent_app_type] => utility
[patent_app_number] => 17/349120
[patent_app_country] => US
[patent_app_date] => 2021-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8617
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349120
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/349120 | Stacked substrate structure with inter-tier interconnection | Jun 15, 2021 | Issued |
Array
(
[id] => 18081073
[patent_doc_number] => 20220406685
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-22
[patent_title] => 3D HETEROGENEOUSLY INTEGRATED SYSTEMS WITH COOLING CHANNELS IN GLASS
[patent_app_type] => utility
[patent_app_number] => 17/349684
[patent_app_country] => US
[patent_app_date] => 2021-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8046
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349684
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/349684 | 3D HETEROGENEOUSLY INTEGRATED SYSTEMS WITH COOLING CHANNELS IN GLASS | Jun 15, 2021 | Abandoned |
Array
(
[id] => 18416165
[patent_doc_number] => 11670714
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-06
[patent_title] => Negative differential resistance device
[patent_app_type] => utility
[patent_app_number] => 17/338400
[patent_app_country] => US
[patent_app_date] => 2021-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4182
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338400
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/338400 | Negative differential resistance device | Jun 2, 2021 | Issued |
Array
(
[id] => 18514753
[patent_doc_number] => 20230231016
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-20
[patent_title] => QUANTUM DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/928807
[patent_app_country] => US
[patent_app_date] => 2021-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14155
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17928807
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/928807 | QUANTUM DEVICE | May 27, 2021 | Pending |
Array
(
[id] => 19328993
[patent_doc_number] => 12046685
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-23
[patent_title] => Semiconductor device with passive magneto-electric transducer
[patent_app_type] => utility
[patent_app_number] => 17/331437
[patent_app_country] => US
[patent_app_date] => 2021-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 5841
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17331437
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/331437 | Semiconductor device with passive magneto-electric transducer | May 25, 2021 | Issued |
Array
(
[id] => 18008844
[patent_doc_number] => 20220367611
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/319457
[patent_app_country] => US
[patent_app_date] => 2021-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5667
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17319457
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/319457 | Semiconductor device and method for manufacturing the same | May 12, 2021 | Issued |
Array
(
[id] => 18721649
[patent_doc_number] => 11799006
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-24
[patent_title] => Mask-free process for improving drain to gate breakdown voltage in semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 17/302846
[patent_app_country] => US
[patent_app_date] => 2021-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 11509
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 298
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17302846
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/302846 | Mask-free process for improving drain to gate breakdown voltage in semiconductor devices | May 12, 2021 | Issued |