Search

Raj R. Gupta

Examiner (ID: 12575, Phone: (571)270-5707 , Office: P/2829 )

Most Active Art Unit
2829
Art Unit(s)
2829, 2893, 2814
Total Applications
829
Issued Applications
593
Pending Applications
52
Abandoned Applications
205

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2136492 [patent_doc_number] => 04516219 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-05-07 [patent_title] => 'Address designating method of memory and apparatus therefor' [patent_app_type] => 1 [patent_app_number] => 6/446403 [patent_app_country] => US [patent_app_date] => 1982-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 10624 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/516/04516219.pdf [firstpage_image] =>[orig_patent_app_number] => 446403 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/446403
Address designating method of memory and apparatus therefor Dec 1, 1982 Issued
Array ( [id] => 2265762 [patent_doc_number] => 04598358 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-07-01 [patent_title] => 'Pipelined digital signal processor using a common data and control bus' [patent_app_type] => 1 [patent_app_number] => 6/437544 [patent_app_country] => US [patent_app_date] => 1982-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10482 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/598/04598358.pdf [firstpage_image] =>[orig_patent_app_number] => 437544 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/437544
Pipelined digital signal processor using a common data and control bus Oct 28, 1982 Issued
Array ( [id] => 2163714 [patent_doc_number] => 04521850 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-06-04 [patent_title] => 'Instruction buffer associated with a cache memory unit' [patent_app_type] => 1 [patent_app_number] => 6/433569 [patent_app_country] => US [patent_app_date] => 1982-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4012 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/521/04521850.pdf [firstpage_image] =>[orig_patent_app_number] => 433569 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/433569
Instruction buffer associated with a cache memory unit Oct 3, 1982 Issued
Array ( [id] => 2209785 [patent_doc_number] => 04545030 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-10-01 [patent_title] => 'Synchronous clock stopper for microprocessor' [patent_app_type] => 1 [patent_app_number] => 6/425668 [patent_app_country] => US [patent_app_date] => 1982-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2373 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/545/04545030.pdf [firstpage_image] =>[orig_patent_app_number] => 425668 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/425668
Synchronous clock stopper for microprocessor Sep 27, 1982 Issued
Array ( [id] => 2501841 [patent_doc_number] => 04843589 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-06-27 [patent_title] => 'Word storage device for use in language interpreter' [patent_app_type] => 1 [patent_app_number] => 6/419535 [patent_app_country] => US [patent_app_date] => 1982-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 11386 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/843/04843589.pdf [firstpage_image] =>[orig_patent_app_number] => 419535 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/419535
Word storage device for use in language interpreter Sep 16, 1982 Issued
06/415380 DOCUMENT DATA STORAGE IN A WORD PROCESSING APPARATUS Sep 6, 1982 Abandoned
Array ( [id] => 2145741 [patent_doc_number] => 04523295 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-06-11 [patent_title] => 'Power loss compensation for programmable memory control system' [patent_app_type] => 1 [patent_app_number] => 6/415309 [patent_app_country] => US [patent_app_date] => 1982-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3201 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/523/04523295.pdf [firstpage_image] =>[orig_patent_app_number] => 415309 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/415309
Power loss compensation for programmable memory control system Sep 6, 1982 Issued
Array ( [id] => 2153545 [patent_doc_number] => 04539635 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-09-03 [patent_title] => 'Pipelined digital processor arranged for conditional operation' [patent_app_type] => 1 [patent_app_number] => 6/401350 [patent_app_country] => US [patent_app_date] => 1982-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 11616 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 421 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/539/04539635.pdf [firstpage_image] =>[orig_patent_app_number] => 401350 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/401350
Pipelined digital processor arranged for conditional operation Jul 22, 1982 Issued
Array ( [id] => 2153736 [patent_doc_number] => 04539652 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-09-03 [patent_title] => 'Networks for data communication' [patent_app_type] => 1 [patent_app_number] => 6/399180 [patent_app_country] => US [patent_app_date] => 1982-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 109 [patent_figures_cnt] => 123 [patent_no_of_words] => 70356 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 598 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/539/04539652.pdf [firstpage_image] =>[orig_patent_app_number] => 399180 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/399180
Networks for data communication Jul 15, 1982 Issued
Array ( [id] => 2498921 [patent_doc_number] => 04829469 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-09 [patent_title] => 'Security system for use with electronic postage meter to prevent lock erasure of data' [patent_app_type] => 1 [patent_app_number] => 6/397395 [patent_app_country] => US [patent_app_date] => 1982-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3630 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/829/04829469.pdf [firstpage_image] =>[orig_patent_app_number] => 397395 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/397395
Security system for use with electronic postage meter to prevent lock erasure of data Jul 11, 1982 Issued
Array ( [id] => 2194155 [patent_doc_number] => 04546433 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-10-08 [patent_title] => 'Arrangement for processing data in a two-dimensional array' [patent_app_type] => 1 [patent_app_number] => 6/393435 [patent_app_country] => US [patent_app_date] => 1982-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4463 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/546/04546433.pdf [firstpage_image] =>[orig_patent_app_number] => 393435 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/393435
Arrangement for processing data in a two-dimensional array Jun 28, 1982 Issued
Array ( [id] => 2108510 [patent_doc_number] => 04484271 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-11-20 [patent_title] => 'Microprogrammed system having hardware interrupt apparatus' [patent_app_type] => 1 [patent_app_number] => 6/392500 [patent_app_country] => US [patent_app_date] => 1982-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 66 [patent_figures_cnt] => 58 [patent_no_of_words] => 57281 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 692 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/484/04484271.pdf [firstpage_image] =>[orig_patent_app_number] => 392500 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/392500
Microprogrammed system having hardware interrupt apparatus Jun 27, 1982 Issued
Array ( [id] => 2184519 [patent_doc_number] => 04509119 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-04-02 [patent_title] => 'Method for managing a buffer pool referenced by batch and interactive processes' [patent_app_type] => 1 [patent_app_number] => 6/391629 [patent_app_country] => US [patent_app_date] => 1982-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4074 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/509/04509119.pdf [firstpage_image] =>[orig_patent_app_number] => 391629 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/391629
Method for managing a buffer pool referenced by batch and interactive processes Jun 23, 1982 Issued
Array ( [id] => 2066362 [patent_doc_number] => 04453230 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-06-05 [patent_title] => 'Address conversion system' [patent_app_type] => 1 [patent_app_number] => 6/390783 [patent_app_country] => US [patent_app_date] => 1982-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 10154 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/453/04453230.pdf [firstpage_image] =>[orig_patent_app_number] => 390783 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/390783
Address conversion system Jun 20, 1982 Issued
Array ( [id] => 2206008 [patent_doc_number] => 04535420 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-08-13 [patent_title] => 'Circular-queue structure' [patent_app_type] => 1 [patent_app_number] => 6/389823 [patent_app_country] => US [patent_app_date] => 1982-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5882 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/535/04535420.pdf [firstpage_image] =>[orig_patent_app_number] => 389823 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/389823
Circular-queue structure Jun 17, 1982 Issued
06/387729 SOFTWARE/HARDWARE INTEGRATION CONTROL SYSTEM Jun 13, 1982 Abandoned
06/387581 INTERACTIVE COMMUNICATION CHANNEL Jun 10, 1982 Abandoned
Array ( [id] => 2044925 [patent_doc_number] => 04418398 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-11-29 [patent_title] => 'Manual reset control circuit for microprocessor controlled washing appliance' [patent_app_type] => 1 [patent_app_number] => 6/387134 [patent_app_country] => US [patent_app_date] => 1982-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 28 [patent_no_of_words] => 9508 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/418/04418398.pdf [firstpage_image] =>[orig_patent_app_number] => 387134 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/387134
Manual reset control circuit for microprocessor controlled washing appliance Jun 9, 1982 Issued
06/385856 METHOD OF AND APPARATUS FOR CONTROLLING THE DISPLAY OF VIDEO SIGNAL INFORMATION Jun 6, 1982 Abandoned
Array ( [id] => 2187956 [patent_doc_number] => 04504903 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-03-12 [patent_title] => 'Central processor with means for suspending instruction operations' [patent_app_type] => 1 [patent_app_number] => 6/385976 [patent_app_country] => US [patent_app_date] => 1982-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5780 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 395 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/504/04504903.pdf [firstpage_image] =>[orig_patent_app_number] => 385976 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/385976
Central processor with means for suspending instruction operations Jun 6, 1982 Issued
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