
Rajesh Khattar
Examiner (ID: 18734)
| Most Active Art Unit | 3693 |
| Art Unit(s) | 3684, 3693, 3626 |
| Total Applications | 666 |
| Issued Applications | 209 |
| Pending Applications | 77 |
| Abandoned Applications | 391 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4140006
[patent_doc_number] => 06147548
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'Sub-bandgap reference using a switched capacitor averaging circuit'
[patent_app_type] => 1
[patent_app_number] => 9/441629
[patent_app_country] => US
[patent_app_date] => 1999-11-16
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[pdf_file] => patents/06/147/06147548.pdf
[firstpage_image] =>[orig_patent_app_number] => 441629
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/441629 | Sub-bandgap reference using a switched capacitor averaging circuit | Nov 15, 1999 | Issued |
Array
(
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[patent_doc_number] => 06373323
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-04-16
[patent_title] => 'Semiconductor integrated circuit device with threshold control'
[patent_app_type] => B2
[patent_app_number] => 09/436012
[patent_app_country] => US
[patent_app_date] => 1999-11-09
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[firstpage_image] =>[orig_patent_app_number] => 09436012
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/436012 | Semiconductor integrated circuit device with threshold control | Nov 8, 1999 | Issued |
Array
(
[id] => 7063829
[patent_doc_number] => 20010043114
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[patent_kind] => A1
[patent_issue_date] => 2001-11-22
[patent_title] => 'VOLTAGE BOOSTING CIRCUIT INCLUDING CAPACITOR WITH REDUCED PARASITIC CAPACITANCE'
[patent_app_type] => new
[patent_app_number] => 09/297867
[patent_app_country] => US
[patent_app_date] => 1999-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => publications/A1/0043/20010043114.pdf
[firstpage_image] =>[orig_patent_app_number] => 09297867
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/297867 | VOLTAGE BOOSTING CIRCUIT INCLUDING CAPACITOR WITH REDUCED PARASITIC CAPACITANCE | Nov 3, 1999 | Abandoned |
Array
(
[id] => 4164319
[patent_doc_number] => 06107865
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[patent_kind] => NA
[patent_issue_date] => 2000-08-22
[patent_title] => 'VSS switching scheme for battery backed-up semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 9/429964
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[patent_app_date] => 1999-10-29
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[patent_no_of_words] => 3093
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[firstpage_image] =>[orig_patent_app_number] => 429964
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/429964 | VSS switching scheme for battery backed-up semiconductor devices | Oct 28, 1999 | Issued |
Array
(
[id] => 4246293
[patent_doc_number] => 06166577
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-26
[patent_title] => 'Semiconductor integrated circuit device and microcomputer'
[patent_app_type] => 1
[patent_app_number] => 9/415220
[patent_app_country] => US
[patent_app_date] => 1999-10-12
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[pdf_file] => patents/06/166/06166577.pdf
[firstpage_image] =>[orig_patent_app_number] => 415220
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/415220 | Semiconductor integrated circuit device and microcomputer | Oct 11, 1999 | Issued |
Array
(
[id] => 4312488
[patent_doc_number] => 06326836
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[patent_issue_date] => 2001-12-04
[patent_title] => 'Isolated reference bias generator with reduced error due to parasitics'
[patent_app_type] => 1
[patent_app_number] => 9/408737
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[patent_app_date] => 1999-09-29
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Array
(
[id] => 4369097
[patent_doc_number] => 06255896
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Method and apparatus for rapid initialization of charge pump circuits'
[patent_app_type] => 1
[patent_app_number] => 9/406329
[patent_app_country] => US
[patent_app_date] => 1999-09-27
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[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 8085
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[pdf_file] => patents/06/255/06255896.pdf
[firstpage_image] =>[orig_patent_app_number] => 406329
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/406329 | Method and apparatus for rapid initialization of charge pump circuits | Sep 26, 1999 | Issued |
Array
(
[id] => 4304285
[patent_doc_number] => 06198343
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-06
[patent_title] => 'Current mirror circuit'
[patent_app_type] => 1
[patent_app_number] => 9/405081
[patent_app_country] => US
[patent_app_date] => 1999-09-27
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[pdf_file] => patents/06/198/06198343.pdf
[firstpage_image] =>[orig_patent_app_number] => 405081
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/405081 | Current mirror circuit | Sep 26, 1999 | Issued |
Array
(
[id] => 1442265
[patent_doc_number] => 06335642
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-01-01
[patent_title] => 'Impedance-to-voltage converter'
[patent_app_type] => B1
[patent_app_number] => 09/381673
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 09381673
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/381673 | Impedance-to-voltage converter | Sep 21, 1999 | Issued |
Array
(
[id] => 4339591
[patent_doc_number] => 06313694
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-06
[patent_title] => 'Internal power voltage generating circuit having a single drive transistor for stand-by and active modes'
[patent_app_type] => 1
[patent_app_number] => 9/399925
[patent_app_country] => US
[patent_app_date] => 1999-09-21
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[pdf_file] => patents/06/313/06313694.pdf
[firstpage_image] =>[orig_patent_app_number] => 399925
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/399925 | Internal power voltage generating circuit having a single drive transistor for stand-by and active modes | Sep 20, 1999 | Issued |
| 09/399263 | ANALOG VOLTAGE ISOLATION CIRCUIT | Sep 19, 1999 | Abandoned |
Array
(
[id] => 7645056
[patent_doc_number] => 06472917
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-10-29
[patent_title] => 'Semiconductor integrated circuit device having compensation for wiring distance delays'
[patent_app_type] => B2
[patent_app_number] => 09/381170
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Array
(
[id] => 4425380
[patent_doc_number] => 06225861
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[patent_title] => 'Variable capacitance circuit'
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Array
(
[id] => 4363501
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/396564 | Voltage and/or current reference circuit | Sep 14, 1999 | Issued |
Array
(
[id] => 1422086
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[patent_title] => 'Output buffer for high and low voltage bus'
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Array
(
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Array
(
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Array
(
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[patent_doc_number] => 06351179
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Array
(
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Array
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