Search

Rajesh Khattar

Examiner (ID: 18734)

Most Active Art Unit
3693
Art Unit(s)
3684, 3693, 3626
Total Applications
666
Issued Applications
209
Pending Applications
77
Abandoned Applications
391

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4140006 [patent_doc_number] => 06147548 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Sub-bandgap reference using a switched capacitor averaging circuit' [patent_app_type] => 1 [patent_app_number] => 9/441629 [patent_app_country] => US [patent_app_date] => 1999-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6523 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/147/06147548.pdf [firstpage_image] =>[orig_patent_app_number] => 441629 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/441629
Sub-bandgap reference using a switched capacitor averaging circuit Nov 15, 1999 Issued
Array ( [id] => 1544998 [patent_doc_number] => 06373323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-04-16 [patent_title] => 'Semiconductor integrated circuit device with threshold control' [patent_app_type] => B2 [patent_app_number] => 09/436012 [patent_app_country] => US [patent_app_date] => 1999-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 9195 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/373/06373323.pdf [firstpage_image] =>[orig_patent_app_number] => 09436012 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/436012
Semiconductor integrated circuit device with threshold control Nov 8, 1999 Issued
Array ( [id] => 7063829 [patent_doc_number] => 20010043114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-22 [patent_title] => 'VOLTAGE BOOSTING CIRCUIT INCLUDING CAPACITOR WITH REDUCED PARASITIC CAPACITANCE' [patent_app_type] => new [patent_app_number] => 09/297867 [patent_app_country] => US [patent_app_date] => 1999-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1396 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20010043114.pdf [firstpage_image] =>[orig_patent_app_number] => 09297867 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/297867
VOLTAGE BOOSTING CIRCUIT INCLUDING CAPACITOR WITH REDUCED PARASITIC CAPACITANCE Nov 3, 1999 Abandoned
Array ( [id] => 4164319 [patent_doc_number] => 06107865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'VSS switching scheme for battery backed-up semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/429964 [patent_app_country] => US [patent_app_date] => 1999-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3093 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107865.pdf [firstpage_image] =>[orig_patent_app_number] => 429964 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/429964
VSS switching scheme for battery backed-up semiconductor devices Oct 28, 1999 Issued
Array ( [id] => 4246293 [patent_doc_number] => 06166577 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Semiconductor integrated circuit device and microcomputer' [patent_app_type] => 1 [patent_app_number] => 9/415220 [patent_app_country] => US [patent_app_date] => 1999-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 9718 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166577.pdf [firstpage_image] =>[orig_patent_app_number] => 415220 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/415220
Semiconductor integrated circuit device and microcomputer Oct 11, 1999 Issued
Array ( [id] => 4312488 [patent_doc_number] => 06326836 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Isolated reference bias generator with reduced error due to parasitics' [patent_app_type] => 1 [patent_app_number] => 9/408737 [patent_app_country] => US [patent_app_date] => 1999-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2144 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326836.pdf [firstpage_image] =>[orig_patent_app_number] => 408737 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/408737
Isolated reference bias generator with reduced error due to parasitics Sep 28, 1999 Issued
Array ( [id] => 4369097 [patent_doc_number] => 06255896 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Method and apparatus for rapid initialization of charge pump circuits' [patent_app_type] => 1 [patent_app_number] => 9/406329 [patent_app_country] => US [patent_app_date] => 1999-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8085 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255896.pdf [firstpage_image] =>[orig_patent_app_number] => 406329 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/406329
Method and apparatus for rapid initialization of charge pump circuits Sep 26, 1999 Issued
Array ( [id] => 4304285 [patent_doc_number] => 06198343 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-06 [patent_title] => 'Current mirror circuit' [patent_app_type] => 1 [patent_app_number] => 9/405081 [patent_app_country] => US [patent_app_date] => 1999-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9895 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/198/06198343.pdf [firstpage_image] =>[orig_patent_app_number] => 405081 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/405081
Current mirror circuit Sep 26, 1999 Issued
Array ( [id] => 1442265 [patent_doc_number] => 06335642 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Impedance-to-voltage converter' [patent_app_type] => B1 [patent_app_number] => 09/381673 [patent_app_country] => US [patent_app_date] => 1999-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4482 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/335/06335642.pdf [firstpage_image] =>[orig_patent_app_number] => 09381673 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/381673
Impedance-to-voltage converter Sep 21, 1999 Issued
Array ( [id] => 4339591 [patent_doc_number] => 06313694 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Internal power voltage generating circuit having a single drive transistor for stand-by and active modes' [patent_app_type] => 1 [patent_app_number] => 9/399925 [patent_app_country] => US [patent_app_date] => 1999-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3286 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313694.pdf [firstpage_image] =>[orig_patent_app_number] => 399925 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/399925
Internal power voltage generating circuit having a single drive transistor for stand-by and active modes Sep 20, 1999 Issued
09/399263 ANALOG VOLTAGE ISOLATION CIRCUIT Sep 19, 1999 Abandoned
Array ( [id] => 7645056 [patent_doc_number] => 06472917 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-29 [patent_title] => 'Semiconductor integrated circuit device having compensation for wiring distance delays' [patent_app_type] => B2 [patent_app_number] => 09/381170 [patent_app_country] => US [patent_app_date] => 1999-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2784 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/472/06472917.pdf [firstpage_image] =>[orig_patent_app_number] => 09381170 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/381170
Semiconductor integrated circuit device having compensation for wiring distance delays Sep 16, 1999 Issued
Array ( [id] => 4425380 [patent_doc_number] => 06225861 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Variable capacitance circuit' [patent_app_type] => 1 [patent_app_number] => 9/397184 [patent_app_country] => US [patent_app_date] => 1999-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225861.pdf [firstpage_image] =>[orig_patent_app_number] => 397184 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/397184
Variable capacitance circuit Sep 15, 1999 Issued
Array ( [id] => 4363501 [patent_doc_number] => 06218894 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Voltage and/or current reference circuit' [patent_app_type] => 1 [patent_app_number] => 9/396564 [patent_app_country] => US [patent_app_date] => 1999-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3599 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218894.pdf [firstpage_image] =>[orig_patent_app_number] => 396564 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/396564
Voltage and/or current reference circuit Sep 14, 1999 Issued
Array ( [id] => 1422086 [patent_doc_number] => 06512401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-28 [patent_title] => 'Output buffer for high and low voltage bus' [patent_app_type] => B2 [patent_app_number] => 09/393134 [patent_app_country] => US [patent_app_date] => 1999-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6951 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/512/06512401.pdf [firstpage_image] =>[orig_patent_app_number] => 09393134 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/393134
Output buffer for high and low voltage bus Sep 9, 1999 Issued
Array ( [id] => 4322444 [patent_doc_number] => 06242970 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Charge-pump device and method of sequencing charge-pump switches' [patent_app_type] => 1 [patent_app_number] => 9/389809 [patent_app_country] => US [patent_app_date] => 1999-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4201 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242970.pdf [firstpage_image] =>[orig_patent_app_number] => 389809 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/389809
Charge-pump device and method of sequencing charge-pump switches Sep 3, 1999 Issued
Array ( [id] => 4363339 [patent_doc_number] => 06201435 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Low-power start-up circuit for a reference voltage generator' [patent_app_type] => 1 [patent_app_number] => 9/383600 [patent_app_country] => US [patent_app_date] => 1999-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4902 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201435.pdf [firstpage_image] =>[orig_patent_app_number] => 383600 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/383600
Low-power start-up circuit for a reference voltage generator Aug 25, 1999 Issued
Array ( [id] => 1464179 [patent_doc_number] => 06351179 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-26 [patent_title] => 'Semiconductor integrated circuit having active mode and standby mode converters' [patent_app_type] => B1 [patent_app_number] => 09/375370 [patent_app_country] => US [patent_app_date] => 1999-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 36 [patent_no_of_words] => 22388 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/351/06351179.pdf [firstpage_image] =>[orig_patent_app_number] => 09375370 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/375370
Semiconductor integrated circuit having active mode and standby mode converters Aug 16, 1999 Issued
Array ( [id] => 4198078 [patent_doc_number] => 06130574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Circuit configuration for producing negative voltages, charge pump having at least two circuit configurations and method of operating a charge pump' [patent_app_type] => 1 [patent_app_number] => 9/360946 [patent_app_country] => US [patent_app_date] => 1999-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3220 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130574.pdf [firstpage_image] =>[orig_patent_app_number] => 360946 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/360946
Circuit configuration for producing negative voltages, charge pump having at least two circuit configurations and method of operating a charge pump Jul 25, 1999 Issued
Array ( [id] => 4336877 [patent_doc_number] => 06320453 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Method and circuit for lowering standby current in an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/359925 [patent_app_country] => US [patent_app_date] => 1999-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3702 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/320/06320453.pdf [firstpage_image] =>[orig_patent_app_number] => 359925 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/359925
Method and circuit for lowering standby current in an integrated circuit Jul 21, 1999 Issued
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