Rajnikant B. Patel

Array ( [id] => 16585808 [patent_doc_number] => 20210020210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => APPARATUS WITH A BIASING MECHANISM AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/064545 [patent_app_country] => US [patent_app_date] => 2020-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11256 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17064545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16585832 [patent_doc_number] => 20210020234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => LOW-POWER AND HIGH-DENSITY CORE-POWER LOWERING FOR MEMORY WRITE ASSIST [patent_app_type] => utility [patent_app_number] => 17/039845 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3746 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17039845 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17017564 [patent_doc_number] => 11087208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Analog neuromorphic circuits for dot-product operation implementing resistive memories [patent_app_type] => utility [patent_app_number] => 17/036533 [patent_app_country] => US [patent_app_date] => 2020-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 22012 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17036533 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16544667 [patent_doc_number] => 20200411082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => METHODS FOR INDEPENDENT MEMORY BANK MAINTENANCE AND MEMORY DEVICES AND SYSTEMS EMPLOYING THE SAME [patent_app_type] => utility [patent_app_number] => 17/018825 [patent_app_country] => US [patent_app_date] => 2020-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17018825 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16544655 [patent_doc_number] => 20200411070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/017528 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17017528 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16593641 [patent_doc_number] => 10902917 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Three-dimensional vertical NOR flash thin-film transistor strings [patent_app_type] => utility [patent_app_number] => 17/005744 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 16839 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17005744 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16747180 [patent_doc_number] => 10972190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Systems and methods for modeling quantum structure and behavior [patent_app_type] => utility [patent_app_number] => 17/003820 [patent_app_country] => US [patent_app_date] => 2020-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 26 [patent_no_of_words] => 27840 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17003820 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16559560 [patent_doc_number] => 20210004709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => CONSTRUCTING AND PROGRAMMING QUANTUM HARDWARE FOR QUANTUM ANNEALING PROCESSES [patent_app_type] => utility [patent_app_number] => 16/997673 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6605 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997673 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16487420 [patent_doc_number] => 20200381029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => Apparatuses And Methods For Setting A Duty Cycle Adjuster For Improving Clock Duty Cycle [patent_app_type] => utility [patent_app_number] => 16/995568 [patent_app_country] => US [patent_app_date] => 2020-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16522 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16995568 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16455770 [patent_doc_number] => 20200365196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => Amplifier Circuit Devices and Methods [patent_app_type] => utility [patent_app_number] => 16/945793 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17829 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16945793 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16819151 [patent_doc_number] => 11003986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Semiconductor device and system using the same [patent_app_type] => utility [patent_app_number] => 16/934110 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 80 [patent_no_of_words] => 39209 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16819151 [patent_doc_number] => 11003986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Semiconductor device and system using the same [patent_app_type] => utility [patent_app_number] => 16/934110 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 80 [patent_no_of_words] => 39209 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16819151 [patent_doc_number] => 11003986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Semiconductor device and system using the same [patent_app_type] => utility [patent_app_number] => 16/934110 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 80 [patent_no_of_words] => 39209 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16819151 [patent_doc_number] => 11003986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Semiconductor device and system using the same [patent_app_type] => utility [patent_app_number] => 16/934110 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 80 [patent_no_of_words] => 39209 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16400247 [patent_doc_number] => 20200341105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => Memory Arrays [patent_app_type] => utility [patent_app_number] => 16/924068 [patent_app_country] => US [patent_app_date] => 2020-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3726 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16924068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16394214 [patent_doc_number] => 20200335155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => STRAP CELL DESIGN FOR STATIC RANDOM ACCESS MEMORY (SRAM) ARRAY [patent_app_type] => utility [patent_app_number] => 16/921156 [patent_app_country] => US [patent_app_date] => 2020-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10235 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16921156 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16928067 [patent_doc_number] => 11049556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => Electronic device and manufacturing method of electronic device [patent_app_type] => utility [patent_app_number] => 16/903041 [patent_app_country] => US [patent_app_date] => 2020-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 29 [patent_no_of_words] => 11263 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16903041 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16348225 [patent_doc_number] => 20200312876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => Three-dimensional vertical NOR Flash Thin-Film Transistor Strings [patent_app_type] => utility [patent_app_number] => 16/899266 [patent_app_country] => US [patent_app_date] => 2020-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899266 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16332065 [patent_doc_number] => 20200303031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/899099 [patent_app_country] => US [patent_app_date] => 2020-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12072 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899099 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16699694 [patent_doc_number] => 10950302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-16 [patent_title] => Resistive memory device [patent_app_type] => utility [patent_app_number] => 16/877511 [patent_app_country] => US [patent_app_date] => 2020-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5302 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16877511 [rel_patent_id] =>[rel_patent_doc_number] =>)