Search

Raleigh W Chiu

Examiner (ID: 8116, Phone: (571)272-4408 , Office: P/3711 )

Most Active Art Unit
3711
Art Unit(s)
2899, 3304, 3711
Total Applications
2653
Issued Applications
1997
Pending Applications
137
Abandoned Applications
518

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11439357 [patent_doc_number] => 20170040378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-09 [patent_title] => 'Apparatus and Method for Reducing Optical Cross-Talk in Image Sensors' [patent_app_type] => utility [patent_app_number] => 15/295703 [patent_app_country] => US [patent_app_date] => 2016-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4922 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15295703 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/295703
Apparatus and method for reducing optical cross-talk in image sensors Oct 16, 2016 Issued
Array ( [id] => 11557754 [patent_doc_number] => 20170104000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-13 [patent_title] => 'VERTICAL MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 15/291662 [patent_app_country] => US [patent_app_date] => 2016-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 12641 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15291662 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/291662
VERTICAL MEMORY DEVICES Oct 11, 2016 Abandoned
Array ( [id] => 11404960 [patent_doc_number] => 20170025498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'NANO-RIBBON CHANNEL TRANSISTOR WITH BACK-BIAS CONTROL' [patent_app_type] => utility [patent_app_number] => 15/283670 [patent_app_country] => US [patent_app_date] => 2016-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6053 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15283670 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/283670
Nano-ribbon channel transistor with back-bias control Oct 2, 2016 Issued
Array ( [id] => 11725363 [patent_doc_number] => 09698230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'MOSFET with asymmetric self-aligned contact' [patent_app_type] => utility [patent_app_number] => 15/283951 [patent_app_country] => US [patent_app_date] => 2016-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 6250 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15283951 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/283951
MOSFET with asymmetric self-aligned contact Oct 2, 2016 Issued
Array ( [id] => 11681342 [patent_doc_number] => 09679877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-13 [patent_title] => 'Semiconductor device comprising PN junction diode and Schottky barrier diode' [patent_app_type] => utility [patent_app_number] => 15/278555 [patent_app_country] => US [patent_app_date] => 2016-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 15864 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15278555 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/278555
Semiconductor device comprising PN junction diode and Schottky barrier diode Sep 27, 2016 Issued
Array ( [id] => 13682553 [patent_doc_number] => 20160380013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/259132 [patent_app_country] => US [patent_app_date] => 2016-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9234 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15259132 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/259132
Oxide semiconductor device including photodiode Sep 7, 2016 Issued
Array ( [id] => 12236178 [patent_doc_number] => 20180069041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'FILL FACTOR ENHANCEMENT' [patent_app_type] => utility [patent_app_number] => 15/257548 [patent_app_country] => US [patent_app_date] => 2016-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3575 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15257548 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/257548
Fill factor enhancement for image sensor Sep 5, 2016 Issued
Array ( [id] => 11495380 [patent_doc_number] => 20170069565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SINGLE-LAYER SUPPORT STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/257770 [patent_app_country] => US [patent_app_date] => 2016-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15257770 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/257770
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SINGLE-LAYER SUPPORT STRUCTURE Sep 5, 2016 Abandoned
Array ( [id] => 11502923 [patent_doc_number] => 20170077108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'SEMICONDUCTOR DEVICE, NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/257613 [patent_app_country] => US [patent_app_date] => 2016-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 12168 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15257613 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/257613
Three-dimensional semiconductor memory device including slit with lateral surfaces having periodicity Sep 5, 2016 Issued
Array ( [id] => 12019868 [patent_doc_number] => 09812580 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-11-07 [patent_title] => 'Deep trench active device with backside body contact' [patent_app_type] => utility [patent_app_number] => 15/257823 [patent_app_country] => US [patent_app_date] => 2016-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 7741 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15257823 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/257823
Deep trench active device with backside body contact Sep 5, 2016 Issued
Array ( [id] => 11607990 [patent_doc_number] => 20170125293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'SUBSTRATE ARRAY FOR PACKAGING INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 15/256573 [patent_app_country] => US [patent_app_date] => 2016-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3328 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15256573 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/256573
SUBSTRATE ARRAY FOR PACKAGING INTEGRATED CIRCUITS Sep 3, 2016 Abandoned
Array ( [id] => 11585785 [patent_doc_number] => 09640436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-02 [patent_title] => 'MOSFET with asymmetric self-aligned contact' [patent_app_type] => utility [patent_app_number] => 15/254096 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 6276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15254096 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/254096
MOSFET with asymmetric self-aligned contact Aug 31, 2016 Issued
Array ( [id] => 12223638 [patent_doc_number] => 20180061998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'BIDIRECTIONAL JFET AND A PROCESS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/254837 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7652 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15254837 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/254837
Bidirectional JFET and a process of forming the same Aug 31, 2016 Issued
Array ( [id] => 11623226 [patent_doc_number] => 20170133413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/255005 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9673 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15255005 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/255005
Method of manufacturing display device including light blocking portion on planarization layer protrusion Aug 31, 2016 Issued
Array ( [id] => 12027083 [patent_doc_number] => 20170317182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'High-K Dielectric and Method of Manufacture' [patent_app_type] => utility [patent_app_number] => 15/254771 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5741 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15254771 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/254771
Method of manufacturing high-k dielectric using HfO/Ti/Hfo layers Aug 31, 2016 Issued
Array ( [id] => 11411706 [patent_doc_number] => 09559018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Dual channel finFET with relaxed pFET region' [patent_app_type] => utility [patent_app_number] => 15/252315 [patent_app_country] => US [patent_app_date] => 2016-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5424 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15252315 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/252315
Dual channel finFET with relaxed pFET region Aug 30, 2016 Issued
Array ( [id] => 11454039 [patent_doc_number] => 09577698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Semiconductor device including spiral shape inductor and horseshoe shape inductor' [patent_app_type] => utility [patent_app_number] => 15/253560 [patent_app_country] => US [patent_app_date] => 2016-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5448 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15253560 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/253560
Semiconductor device including spiral shape inductor and horseshoe shape inductor Aug 30, 2016 Issued
Array ( [id] => 12229881 [patent_doc_number] => 09917130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-13 [patent_title] => 'Image sensor with reduced optical path' [patent_app_type] => utility [patent_app_number] => 15/244355 [patent_app_country] => US [patent_app_date] => 2016-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3128 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15244355 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/244355
Image sensor with reduced optical path Aug 22, 2016 Issued
Array ( [id] => 11328398 [patent_doc_number] => 20160359010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'SEMICONDUCTOR DEVICE STRUCTURE AND MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 15/243003 [patent_app_country] => US [patent_app_date] => 2016-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6688 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15243003 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/243003
Semiconductor device including spacers having different dimensions Aug 21, 2016 Issued
Array ( [id] => 11578684 [patent_doc_number] => 09633955 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-25 [patent_title] => 'Semiconductor integrated circuit structure including dielectric having negative thermal expansion' [patent_app_type] => utility [patent_app_number] => 15/233926 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4094 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233926 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233926
Semiconductor integrated circuit structure including dielectric having negative thermal expansion Aug 9, 2016 Issued
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