Search

Ralf T Seifert

Examiner (ID: 12518, Phone: (571)272-2657 , Office: P/2914 )

Most Active Art Unit
2914
Art Unit(s)
2902, 2914, 2904, 2900
Total Applications
7831
Issued Applications
7748
Pending Applications
0
Abandoned Applications
82

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 419105 [patent_doc_number] => 07276780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-02 [patent_title] => 'Semiconductor device and chip-stack semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/455722 [patent_app_country] => US [patent_app_date] => 2006-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 8340 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/276/07276780.pdf [firstpage_image] =>[orig_patent_app_number] => 11455722 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/455722
Semiconductor device and chip-stack semiconductor device Jun 19, 2006 Issued
Array ( [id] => 5093038 [patent_doc_number] => 20070114647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-24 [patent_title] => 'Carrier board structure with semiconductor chip embedded therein' [patent_app_type] => utility [patent_app_number] => 11/471424 [patent_app_country] => US [patent_app_date] => 2006-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3229 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20070114647.pdf [firstpage_image] =>[orig_patent_app_number] => 11471424 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/471424
Carrier board structure with semiconductor chip embedded therein Jun 19, 2006 Abandoned
Array ( [id] => 5228218 [patent_doc_number] => 20070290325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'Surface mounting structure and packaging method thereof' [patent_app_type] => utility [patent_app_number] => 11/453803 [patent_app_country] => US [patent_app_date] => 2006-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1432 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20070290325.pdf [firstpage_image] =>[orig_patent_app_number] => 11453803 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/453803
Surface mounting structure and packaging method thereof Jun 15, 2006 Abandoned
Array ( [id] => 5239828 [patent_doc_number] => 20070018319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Ball grid array package and substrate within' [patent_app_type] => utility [patent_app_number] => 11/453804 [patent_app_country] => US [patent_app_date] => 2006-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2051 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20070018319.pdf [firstpage_image] =>[orig_patent_app_number] => 11453804 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/453804
Ball grid array package and substrate within Jun 15, 2006 Issued
Array ( [id] => 5854599 [patent_doc_number] => 20060226532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/450333 [patent_app_country] => US [patent_app_date] => 2006-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10236 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20060226532.pdf [firstpage_image] =>[orig_patent_app_number] => 11450333 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/450333
Semiconductor device Jun 11, 2006 Issued
Array ( [id] => 84441 [patent_doc_number] => 07741633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-22 [patent_title] => 'Ferroelectric oxide artificial lattice, method for fabricating the same and ferroelectric storage medium for ultrahigh density data storage device' [patent_app_type] => utility [patent_app_number] => 11/420544 [patent_app_country] => US [patent_app_date] => 2006-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6475 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/741/07741633.pdf [firstpage_image] =>[orig_patent_app_number] => 11420544 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/420544
Ferroelectric oxide artificial lattice, method for fabricating the same and ferroelectric storage medium for ultrahigh density data storage device May 25, 2006 Issued
Array ( [id] => 5605602 [patent_doc_number] => 20060267118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/435894 [patent_app_country] => US [patent_app_date] => 2006-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7741 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20060267118.pdf [firstpage_image] =>[orig_patent_app_number] => 11435894 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/435894
Semiconductor device and method of manufacturing the same May 17, 2006 Issued
Array ( [id] => 5217518 [patent_doc_number] => 20070158829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Connecting module having passive components' [patent_app_type] => utility [patent_app_number] => 11/434733 [patent_app_country] => US [patent_app_date] => 2006-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3359 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20070158829.pdf [firstpage_image] =>[orig_patent_app_number] => 11434733 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/434733
Connecting module having passive components May 16, 2006 Abandoned
Array ( [id] => 5683069 [patent_doc_number] => 20060199339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'METHOD AND STRUCTURE IN THE MANUFACTURE OF MASK READ ONLY MEMORY' [patent_app_type] => utility [patent_app_number] => 11/382270 [patent_app_country] => US [patent_app_date] => 2006-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3149 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20060199339.pdf [firstpage_image] =>[orig_patent_app_number] => 11382270 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/382270
METHOD AND STRUCTURE IN THE MANUFACTURE OF MASK READ ONLY MEMORY May 8, 2006 Abandoned
Array ( [id] => 4968622 [patent_doc_number] => 20070108624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DOWNSET LEAD' [patent_app_type] => utility [patent_app_number] => 11/381734 [patent_app_country] => US [patent_app_date] => 2006-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3564 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20070108624.pdf [firstpage_image] =>[orig_patent_app_number] => 11381734 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/381734
Integrated circuit package system with downset lead May 3, 2006 Issued
Array ( [id] => 557625 [patent_doc_number] => 07470597 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-30 [patent_title] => 'Method of fabricating a multilayered dielectric diffusion barrier layer' [patent_app_type] => utility [patent_app_number] => 11/416028 [patent_app_country] => US [patent_app_date] => 2006-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4963 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/470/07470597.pdf [firstpage_image] =>[orig_patent_app_number] => 11416028 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/416028
Method of fabricating a multilayered dielectric diffusion barrier layer May 1, 2006 Issued
Array ( [id] => 5851256 [patent_doc_number] => 20060234447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Methods of fabricating nonvolatile memory devices and related devices' [patent_app_type] => utility [patent_app_number] => 11/403964 [patent_app_country] => US [patent_app_date] => 2006-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 4474 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20060234447.pdf [firstpage_image] =>[orig_patent_app_number] => 11403964 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/403964
Nonvolatile memory devices Apr 12, 2006 Issued
Array ( [id] => 282209 [patent_doc_number] => 07554210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-30 [patent_title] => 'Semiconductor device with semiconductor chip mounted in package' [patent_app_type] => utility [patent_app_number] => 11/402513 [patent_app_country] => US [patent_app_date] => 2006-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 6268 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/554/07554210.pdf [firstpage_image] =>[orig_patent_app_number] => 11402513 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/402513
Semiconductor device with semiconductor chip mounted in package Apr 10, 2006 Issued
Array ( [id] => 5884289 [patent_doc_number] => 20060273464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Semiconductor device and method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/402324 [patent_app_country] => US [patent_app_date] => 2006-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5475 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20060273464.pdf [firstpage_image] =>[orig_patent_app_number] => 11402324 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/402324
Semiconductor device and method of manufacturing a semiconductor device Apr 10, 2006 Issued
Array ( [id] => 4644944 [patent_doc_number] => 08022551 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Solder composition for electronic devices' [patent_app_type] => utility [patent_app_number] => 11/399856 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 16579 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/022/08022551.pdf [firstpage_image] =>[orig_patent_app_number] => 11399856 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/399856
Solder composition for electronic devices Apr 6, 2006 Issued
Array ( [id] => 877604 [patent_doc_number] => 07358613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-15 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/387972 [patent_app_country] => US [patent_app_date] => 2006-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4754 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/358/07358613.pdf [firstpage_image] =>[orig_patent_app_number] => 11387972 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/387972
Semiconductor device and method of manufacturing the same Mar 23, 2006 Issued
Array ( [id] => 4644915 [patent_doc_number] => 08022522 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-09-20 [patent_title] => 'Semiconductor package' [patent_app_type] => utility [patent_app_number] => 11/388343 [patent_app_country] => US [patent_app_date] => 2006-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 7284 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/022/08022522.pdf [firstpage_image] =>[orig_patent_app_number] => 11388343 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/388343
Semiconductor package Mar 22, 2006 Issued
Array ( [id] => 124207 [patent_doc_number] => 07705473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-27 [patent_title] => 'Methods and apparatus for determining pad height for a wire-bonding operation in an integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/385086 [patent_app_country] => US [patent_app_date] => 2006-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2927 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/705/07705473.pdf [firstpage_image] =>[orig_patent_app_number] => 11385086 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/385086
Methods and apparatus for determining pad height for a wire-bonding operation in an integrated circuit Mar 20, 2006 Issued
Array ( [id] => 5157527 [patent_doc_number] => 20070170571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Low profile semiconductor system having a partial-cavity substrate' [patent_app_type] => utility [patent_app_number] => 11/376394 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4200 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20070170571.pdf [firstpage_image] =>[orig_patent_app_number] => 11376394 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/376394
Low profile semiconductor system having a partial-cavity substrate Mar 14, 2006 Abandoned
Array ( [id] => 5694299 [patent_doc_number] => 20060154446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Method for fabricating semiconductor component with thnned substrate having pin contacts' [patent_app_type] => utility [patent_app_number] => 11/371766 [patent_app_country] => US [patent_app_date] => 2006-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6608 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20060154446.pdf [firstpage_image] =>[orig_patent_app_number] => 11371766 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/371766
Method for fabricating semiconductor component with thinned substrate having pin contacts Mar 8, 2006 Issued
Menu