Ralf T Seifert
Examiner (ID: 12518, Phone: (571)272-2657 , Office: P/2914 )
Most Active Art Unit | 2914 |
Art Unit(s) | 2902, 2914, 2904, 2900 |
Total Applications | 7831 |
Issued Applications | 7748 |
Pending Applications | 0 |
Abandoned Applications | 82 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7016511
[patent_doc_number] => 20050218528
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-06
[patent_title] => 'Capillary underfill channel'
[patent_app_type] => utility
[patent_app_number] => 10/815564
[patent_app_country] => US
[patent_app_date] => 2004-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5340
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0218/20050218528.pdf
[firstpage_image] =>[orig_patent_app_number] => 10815564
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/815564 | Capillary underfill channel | Mar 30, 2004 | Abandoned |
Array
(
[id] => 6949839
[patent_doc_number] => 20050224933
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Thermally enhanced component interposer: finger and net structures'
[patent_app_type] => utility
[patent_app_number] => 10/815583
[patent_app_country] => US
[patent_app_date] => 2004-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4711
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20050224933.pdf
[firstpage_image] =>[orig_patent_app_number] => 10815583
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/815583 | Thermally enhanced component interposer: finger and net structures | Mar 30, 2004 | Issued |
Array
(
[id] => 7080651
[patent_doc_number] => 20050046031
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'Metal line having an increased resistance to electromigration along an interface of a dielectric barrier layer by implanting material into the metal line'
[patent_app_type] => utility
[patent_app_number] => 10/813223
[patent_app_country] => US
[patent_app_date] => 2004-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5860
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0046/20050046031.pdf
[firstpage_image] =>[orig_patent_app_number] => 10813223
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/813223 | Metal line having an increased resistance to electromigration along an interface of a dielectric barrier layer by implanting material into the metal line | Mar 29, 2004 | Issued |
Array
(
[id] => 6949848
[patent_doc_number] => 20050224942
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Semiconductor device with a plurality of ground planes'
[patent_app_type] => utility
[patent_app_number] => 10/810510
[patent_app_country] => US
[patent_app_date] => 2004-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3243
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20050224942.pdf
[firstpage_image] =>[orig_patent_app_number] => 10810510
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/810510 | Semiconductor device with a plurality of ground planes | Mar 25, 2004 | Abandoned |
Array
(
[id] => 6949890
[patent_doc_number] => 20050224984
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Structure and method for contact pads having a protected bondable metal plug over copper-metallized integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 10/811124
[patent_app_country] => US
[patent_app_date] => 2004-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3450
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20050224984.pdf
[firstpage_image] =>[orig_patent_app_number] => 10811124
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/811124 | Structure and method for contact pads having a protected bondable metal plug over copper-metallized integrated circuits | Mar 24, 2004 | Issued |
Array
(
[id] => 4629881
[patent_doc_number] => 08008779
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-30
[patent_title] => 'Semiconductor device and semiconductor device manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 10/807274
[patent_app_country] => US
[patent_app_date] => 2004-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 19
[patent_no_of_words] => 8216
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/008/08008779.pdf
[firstpage_image] =>[orig_patent_app_number] => 10807274
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/807274 | Semiconductor device and semiconductor device manufacturing method | Mar 23, 2004 | Issued |
Array
(
[id] => 6958671
[patent_doc_number] => 20050215041
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-29
[patent_title] => 'Low temperature, long term annealing of nickel contacts to lower interfacial resistance'
[patent_app_type] => utility
[patent_app_number] => 10/807074
[patent_app_country] => US
[patent_app_date] => 2004-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2919
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0215/20050215041.pdf
[firstpage_image] =>[orig_patent_app_number] => 10807074
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/807074 | Low temperature, long term annealing of nickel contacts to lower interfacial resistance | Mar 22, 2004 | Abandoned |
Array
(
[id] => 6949798
[patent_doc_number] => 20050224892
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Method and structure in the manufacture of mask read only memory'
[patent_app_type] => utility
[patent_app_number] => 10/807795
[patent_app_country] => US
[patent_app_date] => 2004-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3105
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20050224892.pdf
[firstpage_image] =>[orig_patent_app_number] => 10807795
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/807795 | Method and structure in the manufacture of mask read only memory | Mar 22, 2004 | Issued |
Array
(
[id] => 979387
[patent_doc_number] => 06930393
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-16
[patent_title] => 'Composition for forming porous film, porous film and method for forming the same, interlayer insulator film, and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/807494
[patent_app_country] => US
[patent_app_date] => 2004-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 9007
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/930/06930393.pdf
[firstpage_image] =>[orig_patent_app_number] => 10807494
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/807494 | Composition for forming porous film, porous film and method for forming the same, interlayer insulator film, and semiconductor device | Mar 22, 2004 | Issued |
Array
(
[id] => 5805141
[patent_doc_number] => 20060091494
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-04
[patent_title] => 'High-permittivity insulation film, thin film capacity element, thin film multilayer capacitor, and production method of thin film capacity element'
[patent_app_type] => utility
[patent_app_number] => 10/546834
[patent_app_country] => US
[patent_app_date] => 2004-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 10983
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0091/20060091494.pdf
[firstpage_image] =>[orig_patent_app_number] => 10546834
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/546834 | High-permittivity insulation film, thin film capacity element, thin film multilayer capacitor, and production method of thin film capacity element | Feb 23, 2004 | Issued |
Array
(
[id] => 7317335
[patent_doc_number] => 20040224241
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-11
[patent_title] => 'Thin film transistor array panel, manufacturing method thereof, and mask therefor'
[patent_app_type] => new
[patent_app_number] => 10/771278
[patent_app_country] => US
[patent_app_date] => 2004-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 55
[patent_figures_cnt] => 55
[patent_no_of_words] => 12778
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20040224241.pdf
[firstpage_image] =>[orig_patent_app_number] => 10771278
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/771278 | Thin film transistor array panel, manufacturing method thereof, and mask therefor | Feb 1, 2004 | Abandoned |
Array
(
[id] => 7677490
[patent_doc_number] => 20040152336
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-05
[patent_title] => 'Semiconductor device and its manufacturing method'
[patent_app_type] => new
[patent_app_number] => 10/752043
[patent_app_country] => US
[patent_app_date] => 2004-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 17849
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20040152336.pdf
[firstpage_image] =>[orig_patent_app_number] => 10752043
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/752043 | Semiconductor device and its manufacturing method | Jan 6, 2004 | Abandoned |
Array
(
[id] => 7614972
[patent_doc_number] => 06897554
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-05-24
[patent_title] => 'Test circuit and multi-chip package type semiconductor device having the test circuit'
[patent_app_type] => utility
[patent_app_number] => 10/747238
[patent_app_country] => US
[patent_app_date] => 2003-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 13166
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/897/06897554.pdf
[firstpage_image] =>[orig_patent_app_number] => 10747238
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/747238 | Test circuit and multi-chip package type semiconductor device having the test circuit | Dec 29, 2003 | Issued |
Array
(
[id] => 7236899
[patent_doc_number] => 20050140028
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-30
[patent_title] => 'Forming a chip package having a no-flow underfill'
[patent_app_type] => utility
[patent_app_number] => 10/748023
[patent_app_country] => US
[patent_app_date] => 2003-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2896
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0140/20050140028.pdf
[firstpage_image] =>[orig_patent_app_number] => 10748023
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/748023 | Forming a chip package having a no-flow underfill | Dec 29, 2003 | Issued |
Array
(
[id] => 877382
[patent_doc_number] => 07358535
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-15
[patent_title] => 'Photo-coupler semiconductor device and production method therefor'
[patent_app_type] => utility
[patent_app_number] => 10/747403
[patent_app_country] => US
[patent_app_date] => 2003-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 26
[patent_no_of_words] => 5363
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/358/07358535.pdf
[firstpage_image] =>[orig_patent_app_number] => 10747403
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/747403 | Photo-coupler semiconductor device and production method therefor | Dec 29, 2003 | Issued |
Array
(
[id] => 1025574
[patent_doc_number] => 06885095
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-26
[patent_title] => 'Test circuit and multi-chip package type semiconductor device having the test circuit'
[patent_app_type] => utility
[patent_app_number] => 10/747230
[patent_app_country] => US
[patent_app_date] => 2003-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 13166
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 240
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/885/06885095.pdf
[firstpage_image] =>[orig_patent_app_number] => 10747230
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/747230 | Test circuit and multi-chip package type semiconductor device having the test circuit | Dec 29, 2003 | Issued |
Array
(
[id] => 1025572
[patent_doc_number] => 06885094
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-26
[patent_title] => 'Test circuit and multi-chip package type semiconductor device having the test circuit'
[patent_app_type] => utility
[patent_app_number] => 10/747153
[patent_app_country] => US
[patent_app_date] => 2003-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 13165
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/885/06885094.pdf
[firstpage_image] =>[orig_patent_app_number] => 10747153
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/747153 | Test circuit and multi-chip package type semiconductor device having the test circuit | Dec 29, 2003 | Issued |
Array
(
[id] => 7260343
[patent_doc_number] => 20040150089
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-05
[patent_title] => 'Test circuit and multi-chip package type semiconductor device having the test circuit'
[patent_app_type] => new
[patent_app_number] => 10/747154
[patent_app_country] => US
[patent_app_date] => 2003-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 13269
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0150/20040150089.pdf
[firstpage_image] =>[orig_patent_app_number] => 10747154
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/747154 | Test circuit and multi-chip package type semiconductor device having the test circuit | Dec 29, 2003 | Issued |
Array
(
[id] => 5019582
[patent_doc_number] => 20070145548
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-28
[patent_title] => 'Stack-type semiconductor package and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 10/746024
[patent_app_country] => US
[patent_app_date] => 2003-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8102
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0145/20070145548.pdf
[firstpage_image] =>[orig_patent_app_number] => 10746024
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/746024 | Stack-type semiconductor package and manufacturing method thereof | Dec 21, 2003 | Abandoned |
Array
(
[id] => 7329046
[patent_doc_number] => 20040130030
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-08
[patent_title] => 'Semiconductor device and method for manufacturing same'
[patent_app_type] => new
[patent_app_number] => 10/740813
[patent_app_country] => US
[patent_app_date] => 2003-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 8843
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0130/20040130030.pdf
[firstpage_image] =>[orig_patent_app_number] => 10740813
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/740813 | Semiconductor device and method for manufacturing same | Dec 21, 2003 | Issued |