Ralf T Seifert

Array ( [id] => 6832754 [patent_doc_number] => 20030160299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'On- chip inductor having improved quality factor and method of manufacture thereof' [patent_app_type] => new [patent_app_number] => 10/074293 [patent_app_country] => US [patent_app_date] => 2002-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2330 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20030160299.pdf [firstpage_image] =>[orig_patent_app_number] => 10074293 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1086547 [patent_doc_number] => 06831360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-14 [patent_title] => 'Semiconductor device having an elastic resin with a low modulus of elasticity' [patent_app_type] => B2 [patent_app_number] => 10/021173 [patent_app_country] => US [patent_app_date] => 2001-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 10145 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/831/06831360.pdf [firstpage_image] =>[orig_patent_app_number] => 10021173 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1141145 [patent_doc_number] => 06781239 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-24 [patent_title] => 'Integrated circuit and method of forming the integrated circuit having a die with high Q inductors and capacitors attached to a die with a circuit as a flip chip' [patent_app_type] => B1 [patent_app_number] => 10/010343 [patent_app_country] => US [patent_app_date] => 2001-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3126 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/781/06781239.pdf [firstpage_image] =>[orig_patent_app_number] => 10010343 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6342711 [patent_doc_number] => 20020034839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-21 [patent_title] => 'Multi-level circuit substrate, method for manufacturing same and method for adjusting a characteristic impedance therefor' [patent_app_type] => new [patent_app_number] => 09/994683 [patent_app_country] => US [patent_app_date] => 2001-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8328 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20020034839.pdf [firstpage_image] =>[orig_patent_app_number] => 09994683 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6571901 [patent_doc_number] => 20020084516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'Individualized low parasitic power distribution lines deposited over active integrated circuits' [patent_app_type] => new [patent_app_number] => 10/039663 [patent_app_country] => US [patent_app_date] => 2001-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6222 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20020084516.pdf [firstpage_image] =>[orig_patent_app_number] => 10039663 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1321601 [patent_doc_number] => 06605865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-12 [patent_title] => 'Semiconductor package with optimized leadframe bonding strength' [patent_app_type] => B2 [patent_app_number] => 09/998844 [patent_app_country] => US [patent_app_date] => 2001-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 5273 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/605/06605865.pdf [firstpage_image] =>[orig_patent_app_number] => 09998844 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6092120 [patent_doc_number] => 20020050651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-02 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 09/982144 [patent_app_country] => US [patent_app_date] => 2001-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6310 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20020050651.pdf [firstpage_image] =>[orig_patent_app_number] => 09982144 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5870690 [patent_doc_number] => 20020047192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-25 [patent_title] => 'Test circuit and multi-chip package type semiconductor device having the test circuit' [patent_app_type] => new [patent_app_number] => 09/978630 [patent_app_country] => US [patent_app_date] => 2001-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13263 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20020047192.pdf [firstpage_image] =>[orig_patent_app_number] => 09978630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6349216 [patent_doc_number] => 20020056920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'High- frequency semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 09/977274 [patent_app_country] => US [patent_app_date] => 2001-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9312 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20020056920.pdf [firstpage_image] =>[orig_patent_app_number] => 09977274 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6237572 [patent_doc_number] => 20020043712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Circuit structure integrating the power distribution functions of circuits and leadframes into the chip surface' [patent_app_type] => new [patent_app_number] => 09/975630 [patent_app_country] => US [patent_app_date] => 2001-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5023 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20020043712.pdf [firstpage_image] =>[orig_patent_app_number] => 09975630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5870719 [patent_doc_number] => 20020047210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-25 [patent_title] => 'Semiconductor chip, wiring board and manufacturing process thereof as well as semiconductor device' [patent_app_type] => new [patent_app_number] => 09/972884 [patent_app_country] => US [patent_app_date] => 2001-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 71 [patent_figures_cnt] => 71 [patent_no_of_words] => 31397 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20020047210.pdf [firstpage_image] =>[orig_patent_app_number] => 09972884 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6577710 [patent_doc_number] => 20020041018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-11 [patent_title] => 'Semiconductor chip package and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 09/975470 [patent_app_country] => US [patent_app_date] => 2001-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2820 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20020041018.pdf [firstpage_image] =>[orig_patent_app_number] => 09975470 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6111234 [patent_doc_number] => 20020173069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Mounting structure of semiconductor chip, semiconductor device and method of making the semiconductor device' [patent_app_type] => new [patent_app_number] => 09/958094 [patent_app_country] => US [patent_app_date] => 2001-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3913 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20020173069.pdf [firstpage_image] =>[orig_patent_app_number] => 09958094 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1193822 [patent_doc_number] => 06731001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-04 [patent_title] => 'Semiconductor device including bonded wire based to electronic part and method for manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/918803 [patent_app_country] => US [patent_app_date] => 2001-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 7390 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/731/06731001.pdf [firstpage_image] =>[orig_patent_app_number] => 09918803 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6536521 [patent_doc_number] => 20020163086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-07 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 09/892603 [patent_app_country] => US [patent_app_date] => 2001-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 15146 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20020163086.pdf [firstpage_image] =>[orig_patent_app_number] => 09892603 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7623512 [patent_doc_number] => 06686653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Miniature microdevice package and process for making thereof' [patent_app_type] => B2 [patent_app_number] => 09/888713 [patent_app_country] => US [patent_app_date] => 2001-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 6793 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686653.pdf [firstpage_image] =>[orig_patent_app_number] => 09888713 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6107256 [patent_doc_number] => 20020171157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Electronic device' [patent_app_type] => new [patent_app_number] => 09/880733 [patent_app_country] => US [patent_app_date] => 2001-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 16513 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20020171157.pdf [firstpage_image] =>[orig_patent_app_number] => 09880733 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5798593 [patent_doc_number] => 20020008299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-24 [patent_title] => 'Integrated device with a trench isolation structure, and fabrication process therefor' [patent_app_type] => new [patent_app_number] => 09/853833 [patent_app_country] => US [patent_app_date] => 2001-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3448 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20020008299.pdf [firstpage_image] =>[orig_patent_app_number] => 09853833 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6170306 [patent_doc_number] => 20020153598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Device for attaching a semiconductor chip to a chip carrier' [patent_app_type] => new [patent_app_number] => 09/838053 [patent_app_country] => US [patent_app_date] => 2001-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2026 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20020153598.pdf [firstpage_image] =>[orig_patent_app_number] => 09838053 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1424443 [patent_doc_number] => 06507093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-14 [patent_title] => 'Lead frame for fabricating surface mount type semiconductor devices with high reliability' [patent_app_type] => B2 [patent_app_number] => 09/836174 [patent_app_country] => US [patent_app_date] => 2001-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 9732 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/507/06507093.pdf [firstpage_image] =>[orig_patent_app_number] => 09836174 [rel_patent_id] =>[rel_patent_doc_number] =>)