Search

Ramon A. Mercado

Examiner (ID: 5601, Phone: (571)270-5744 , Office: P/2132 )

Most Active Art Unit
2132
Art Unit(s)
2182, 3658, 2132, 2186
Total Applications
468
Issued Applications
375
Pending Applications
16
Abandoned Applications
78

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1116583 [patent_doc_number] => 06804745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-12 [patent_title] => 'Disc access apparatus and disc access method' [patent_app_type] => B2 [patent_app_number] => 10/180019 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3762 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/804/06804745.pdf [firstpage_image] =>[orig_patent_app_number] => 10180019 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/180019
Disc access apparatus and disc access method Jun 26, 2002 Issued
Array ( [id] => 6798434 [patent_doc_number] => 20030177309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Coherence preservation method of duplicated data in RAID subsystem' [patent_app_type] => new [patent_app_number] => 10/175099 [patent_app_country] => US [patent_app_date] => 2002-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4269 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20030177309.pdf [firstpage_image] =>[orig_patent_app_number] => 10175099 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/175099
Coherence preservation method of duplicated data in RAID subsystem Jun 19, 2002 Issued
Array ( [id] => 6717364 [patent_doc_number] => 20030028712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Semiconductor memory' [patent_app_type] => new [patent_app_number] => 10/174962 [patent_app_country] => US [patent_app_date] => 2002-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11043 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20030028712.pdf [firstpage_image] =>[orig_patent_app_number] => 10174962 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/174962
Semiconductor memory Jun 19, 2002 Issued
Array ( [id] => 987716 [patent_doc_number] => 06925539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Data transfer performance through resource allocation' [patent_app_type] => utility [patent_app_number] => 10/176207 [patent_app_country] => US [patent_app_date] => 2002-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3878 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/925/06925539.pdf [firstpage_image] =>[orig_patent_app_number] => 10176207 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/176207
Data transfer performance through resource allocation Jun 19, 2002 Issued
Array ( [id] => 1046328 [patent_doc_number] => 06868478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-15 [patent_title] => 'Method, system, and article of manufacture for optimizing storage utilization' [patent_app_type] => utility [patent_app_number] => 10/176354 [patent_app_country] => US [patent_app_date] => 2002-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5556 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/868/06868478.pdf [firstpage_image] =>[orig_patent_app_number] => 10176354 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/176354
Method, system, and article of manufacture for optimizing storage utilization Jun 19, 2002 Issued
Array ( [id] => 7628183 [patent_doc_number] => 06820177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-16 [patent_title] => 'Protected configuration space in a protected environment' [patent_app_type] => B2 [patent_app_number] => 10/167434 [patent_app_country] => US [patent_app_date] => 2002-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4980 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/820/06820177.pdf [firstpage_image] =>[orig_patent_app_number] => 10167434 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167434
Protected configuration space in a protected environment Jun 11, 2002 Issued
Array ( [id] => 6806123 [patent_doc_number] => 20030233517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-18 [patent_title] => 'Circuit for looping serial bit streams from parallel memory' [patent_app_type] => new [patent_app_number] => 10/170122 [patent_app_country] => US [patent_app_date] => 2002-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20030233517.pdf [firstpage_image] =>[orig_patent_app_number] => 10170122 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/170122
Circuit for looping serial bit streams from parallel memory Jun 11, 2002 Issued
Array ( [id] => 987720 [patent_doc_number] => 06925541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Method and apparatus for managing replication volumes' [patent_app_type] => utility [patent_app_number] => 10/170804 [patent_app_country] => US [patent_app_date] => 2002-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 8244 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/925/06925541.pdf [firstpage_image] =>[orig_patent_app_number] => 10170804 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/170804
Method and apparatus for managing replication volumes Jun 11, 2002 Issued
Array ( [id] => 6679621 [patent_doc_number] => 20030229762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Apparatus, method, and system for synchronizing information prefetch between processors and memory controllers' [patent_app_type] => new [patent_app_number] => 10/170171 [patent_app_country] => US [patent_app_date] => 2002-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3678 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20030229762.pdf [firstpage_image] =>[orig_patent_app_number] => 10170171 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/170171
Apparatus, method, and system for synchronizing information prefetch between processors and memory controllers Jun 10, 2002 Issued
Array ( [id] => 1058969 [patent_doc_number] => 06857050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Data storage system using 3-party hand-off protocol to maintain a single coherent logical image' [patent_app_type] => utility [patent_app_number] => 10/167147 [patent_app_country] => US [patent_app_date] => 2002-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8483 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/857/06857050.pdf [firstpage_image] =>[orig_patent_app_number] => 10167147 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167147
Data storage system using 3-party hand-off protocol to maintain a single coherent logical image Jun 9, 2002 Issued
Array ( [id] => 1196975 [patent_doc_number] => 06732238 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Set-associative cache memory having variable time decay rewriting algorithm' [patent_app_type] => B1 [patent_app_number] => 10/167133 [patent_app_country] => US [patent_app_date] => 2002-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5393 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732238.pdf [firstpage_image] =>[orig_patent_app_number] => 10167133 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167133
Set-associative cache memory having variable time decay rewriting algorithm Jun 9, 2002 Issued
Array ( [id] => 1058965 [patent_doc_number] => 06857047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Memory compression for computer systems' [patent_app_type] => utility [patent_app_number] => 10/167358 [patent_app_country] => US [patent_app_date] => 2002-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4975 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/857/06857047.pdf [firstpage_image] =>[orig_patent_app_number] => 10167358 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167358
Memory compression for computer systems Jun 9, 2002 Issued
Array ( [id] => 1052598 [patent_doc_number] => 06862666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-01 [patent_title] => 'Hardware assisted lease-based access to memory' [patent_app_type] => utility [patent_app_number] => 10/147729 [patent_app_country] => US [patent_app_date] => 2002-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6629 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862666.pdf [firstpage_image] =>[orig_patent_app_number] => 10147729 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/147729
Hardware assisted lease-based access to memory May 15, 2002 Issued
Array ( [id] => 1186683 [patent_doc_number] => 06738890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-18 [patent_title] => 'Data processor' [patent_app_type] => B2 [patent_app_number] => 10/145761 [patent_app_country] => US [patent_app_date] => 2002-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 5028 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738890.pdf [firstpage_image] =>[orig_patent_app_number] => 10145761 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/145761
Data processor May 15, 2002 Issued
Array ( [id] => 6771282 [patent_doc_number] => 20030217222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Calibration method implementing segmented flash memeory and RAM overlay' [patent_app_type] => new [patent_app_number] => 10/146776 [patent_app_country] => US [patent_app_date] => 2002-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2955 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20030217222.pdf [firstpage_image] =>[orig_patent_app_number] => 10146776 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/146776
Calibration method implementing segmented flash memory and RAM overlay May 15, 2002 Issued
Array ( [id] => 6793365 [patent_doc_number] => 20030088709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'System and method of composing and decomposing a ROM image' [patent_app_type] => new [patent_app_number] => 10/147956 [patent_app_country] => US [patent_app_date] => 2002-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2860 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20030088709.pdf [firstpage_image] =>[orig_patent_app_number] => 10147956 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/147956
System and method of composing and decomposing a ROM image May 14, 2002 Issued
Array ( [id] => 6771291 [patent_doc_number] => 20030217231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Method and apparatus for prefetching objects into an object cache' [patent_app_type] => new [patent_app_number] => 10/146268 [patent_app_country] => US [patent_app_date] => 2002-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3131 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20030217231.pdf [firstpage_image] =>[orig_patent_app_number] => 10146268 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/146268
Method and apparatus for prefetching objects into an object cache May 14, 2002 Issued
Array ( [id] => 1129596 [patent_doc_number] => 06795897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-21 [patent_title] => 'Selective memory controller access path for directory caching' [patent_app_type] => B2 [patent_app_number] => 10/146692 [patent_app_country] => US [patent_app_date] => 2002-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4260 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/795/06795897.pdf [firstpage_image] =>[orig_patent_app_number] => 10146692 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/146692
Selective memory controller access path for directory caching May 14, 2002 Issued
Array ( [id] => 1155168 [patent_doc_number] => 06779092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-17 [patent_title] => 'Reordering requests for access to subdivided resource' [patent_app_type] => B2 [patent_app_number] => 10/146621 [patent_app_country] => US [patent_app_date] => 2002-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4126 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/779/06779092.pdf [firstpage_image] =>[orig_patent_app_number] => 10146621 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/146621
Reordering requests for access to subdivided resource May 14, 2002 Issued
Array ( [id] => 1001721 [patent_doc_number] => 06912639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-28 [patent_title] => 'Memory management method and apparatus for use in an open geographic information system' [patent_app_type] => utility [patent_app_number] => 10/142055 [patent_app_country] => US [patent_app_date] => 2002-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2712 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/912/06912639.pdf [firstpage_image] =>[orig_patent_app_number] => 10142055 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/142055
Memory management method and apparatus for use in an open geographic information system May 9, 2002 Issued
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