Search

Ramon A. Mercado

Examiner (ID: 5601, Phone: (571)270-5744 , Office: P/2132 )

Most Active Art Unit
2132
Art Unit(s)
2182, 3658, 2132, 2186
Total Applications
468
Issued Applications
375
Pending Applications
16
Abandoned Applications
78

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4391699 [patent_doc_number] => 06289425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Method for verifying availability of data space in virtual tape system' [patent_app_type] => 1 [patent_app_number] => 9/108888 [patent_app_country] => US [patent_app_date] => 1998-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1924 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/289/06289425.pdf [firstpage_image] =>[orig_patent_app_number] => 108888 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/108888
Method for verifying availability of data space in virtual tape system Jun 30, 1998 Issued
Array ( [id] => 1452287 [patent_doc_number] => 06370619 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Managing partitioned cache' [patent_app_type] => B1 [patent_app_number] => 09/102735 [patent_app_country] => US [patent_app_date] => 1998-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6782 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/370/06370619.pdf [firstpage_image] =>[orig_patent_app_number] => 09102735 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/102735
Managing partitioned cache Jun 21, 1998 Issued
Array ( [id] => 4335100 [patent_doc_number] => 06243788 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Cache architecture to enable accurate cache sensitivity' [patent_app_type] => 1 [patent_app_number] => 9/098988 [patent_app_country] => US [patent_app_date] => 1998-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6291 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243788.pdf [firstpage_image] =>[orig_patent_app_number] => 098988 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/098988
Cache architecture to enable accurate cache sensitivity Jun 16, 1998 Issued
Array ( [id] => 1557538 [patent_doc_number] => 06401176 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Multiple agent use of a multi-ported shared memory' [patent_app_type] => B1 [patent_app_number] => 09/098503 [patent_app_country] => US [patent_app_date] => 1998-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6921 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/401/06401176.pdf [firstpage_image] =>[orig_patent_app_number] => 09098503 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/098503
Multiple agent use of a multi-ported shared memory Jun 16, 1998 Issued
Array ( [id] => 4317784 [patent_doc_number] => 06185663 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Computer method and apparatus for file system block allocation with multiple redo' [patent_app_type] => 1 [patent_app_number] => 9/094733 [patent_app_country] => US [patent_app_date] => 1998-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10466 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/185/06185663.pdf [firstpage_image] =>[orig_patent_app_number] => 094733 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/094733
Computer method and apparatus for file system block allocation with multiple redo Jun 14, 1998 Issued
Array ( [id] => 4402134 [patent_doc_number] => 06279074 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Contention handling for task requests to storage devices within a host system' [patent_app_type] => 1 [patent_app_number] => 9/088347 [patent_app_country] => US [patent_app_date] => 1998-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4737 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/279/06279074.pdf [firstpage_image] =>[orig_patent_app_number] => 088347 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/088347
Contention handling for task requests to storage devices within a host system May 31, 1998 Issued
Array ( [id] => 4423705 [patent_doc_number] => 06240492 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Memory interface for functional unit of integrated system allowing access to dedicated memory and shared memory, and speculative generation of lookahead fetch requests' [patent_app_type] => 1 [patent_app_number] => 9/083849 [patent_app_country] => US [patent_app_date] => 1998-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6192 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240492.pdf [firstpage_image] =>[orig_patent_app_number] => 083849 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/083849
Memory interface for functional unit of integrated system allowing access to dedicated memory and shared memory, and speculative generation of lookahead fetch requests May 21, 1998 Issued
Array ( [id] => 4371118 [patent_doc_number] => 06216205 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Methods of controlling memory buffers having tri-port cache arrays therein' [patent_app_type] => 1 [patent_app_number] => 9/082893 [patent_app_country] => US [patent_app_date] => 1998-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 14310 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/216/06216205.pdf [firstpage_image] =>[orig_patent_app_number] => 082893 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/082893
Methods of controlling memory buffers having tri-port cache arrays therein May 20, 1998 Issued
Array ( [id] => 4333268 [patent_doc_number] => 06317817 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Image operation processing apparatus storing discrete data efficiently in a memory and operating method thereof' [patent_app_type] => 1 [patent_app_number] => 9/078491 [patent_app_country] => US [patent_app_date] => 1998-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6665 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/317/06317817.pdf [firstpage_image] =>[orig_patent_app_number] => 078491 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/078491
Image operation processing apparatus storing discrete data efficiently in a memory and operating method thereof May 13, 1998 Issued
Array ( [id] => 4304683 [patent_doc_number] => 06269423 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Method and apparatus for providing improved caching for a virtual tape server' [patent_app_type] => 1 [patent_app_number] => 9/078181 [patent_app_country] => US [patent_app_date] => 1998-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4603 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/269/06269423.pdf [firstpage_image] =>[orig_patent_app_number] => 078181 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/078181
Method and apparatus for providing improved caching for a virtual tape server May 12, 1998 Issued
Array ( [id] => 4138598 [patent_doc_number] => 06073206 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Method for flashing ESCD and variables into a ROM' [patent_app_type] => 1 [patent_app_number] => 9/070866 [patent_app_country] => US [patent_app_date] => 1998-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4163 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/073/06073206.pdf [firstpage_image] =>[orig_patent_app_number] => 070866 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/070866
Method for flashing ESCD and variables into a ROM Apr 29, 1998 Issued
Array ( [id] => 4373588 [patent_doc_number] => 06202121 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'System and method for improved program launch time' [patent_app_type] => 1 [patent_app_number] => 9/060702 [patent_app_country] => US [patent_app_date] => 1998-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 11201 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/202/06202121.pdf [firstpage_image] =>[orig_patent_app_number] => 060702 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/060702
System and method for improved program launch time Apr 14, 1998 Issued
Array ( [id] => 1580268 [patent_doc_number] => 06470411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-22 [patent_title] => 'Method and device for accessing sets of data contained in mass memory' [patent_app_type] => B2 [patent_app_number] => 09/058915 [patent_app_country] => US [patent_app_date] => 1998-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1840 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/470/06470411.pdf [firstpage_image] =>[orig_patent_app_number] => 09058915 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/058915
Method and device for accessing sets of data contained in mass memory Apr 12, 1998 Issued
Array ( [id] => 4124096 [patent_doc_number] => 06101589 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'High performance shared cache' [patent_app_type] => 1 [patent_app_number] => 9/058431 [patent_app_country] => US [patent_app_date] => 1998-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6069 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101589.pdf [firstpage_image] =>[orig_patent_app_number] => 058431 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/058431
High performance shared cache Apr 9, 1998 Issued
Array ( [id] => 4422366 [patent_doc_number] => 06272593 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Dynamic network cache directories' [patent_app_type] => 1 [patent_app_number] => 9/058982 [patent_app_country] => US [patent_app_date] => 1998-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4396 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/272/06272593.pdf [firstpage_image] =>[orig_patent_app_number] => 058982 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/058982
Dynamic network cache directories Apr 9, 1998 Issued
Array ( [id] => 4379542 [patent_doc_number] => 06192447 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Method and apparatus for resetting a random access memory' [patent_app_type] => 1 [patent_app_number] => 9/058001 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1810 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/192/06192447.pdf [firstpage_image] =>[orig_patent_app_number] => 058001 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/058001
Method and apparatus for resetting a random access memory Apr 8, 1998 Issued
Array ( [id] => 4279705 [patent_doc_number] => 06205513 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'System and process for load an operating system of an information processing device' [patent_app_type] => 1 [patent_app_number] => 9/043923 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1060 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/205/06205513.pdf [firstpage_image] =>[orig_patent_app_number] => 043923 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/043923
System and process for load an operating system of an information processing device Apr 8, 1998 Issued
Array ( [id] => 4118151 [patent_doc_number] => 06098145 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Pulsed Y-decoders for improving bitline precharging in memories' [patent_app_type] => 1 [patent_app_number] => 9/025727 [patent_app_country] => US [patent_app_date] => 1998-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3756 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/098/06098145.pdf [firstpage_image] =>[orig_patent_app_number] => 025727 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/025727
Pulsed Y-decoders for improving bitline precharging in memories Feb 17, 1998 Issued
Array ( [id] => 1431062 [patent_doc_number] => 06507898 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-14 [patent_title] => 'Reconfigurable data cache controller' [patent_app_type] => B1 [patent_app_number] => 09/025770 [patent_app_country] => US [patent_app_date] => 1998-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 135 [patent_figures_cnt] => 171 [patent_no_of_words] => 91268 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/507/06507898.pdf [firstpage_image] =>[orig_patent_app_number] => 09025770 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/025770
Reconfigurable data cache controller Feb 17, 1998 Issued
Array ( [id] => 4323790 [patent_doc_number] => 06189069 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Optimized logging of data elements to a data storage device' [patent_app_type] => 1 [patent_app_number] => 9/024248 [patent_app_country] => US [patent_app_date] => 1998-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 6522 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/189/06189069.pdf [firstpage_image] =>[orig_patent_app_number] => 024248 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/024248
Optimized logging of data elements to a data storage device Feb 16, 1998 Issued
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