
Ramon A. Mercado
Examiner (ID: 5601, Phone: (571)270-5744 , Office: P/2132 )
| Most Active Art Unit | 2132 |
| Art Unit(s) | 2182, 3658, 2132, 2186 |
| Total Applications | 468 |
| Issued Applications | 375 |
| Pending Applications | 16 |
| Abandoned Applications | 78 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 645520
[patent_doc_number] => 07124253
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-10-17
[patent_title] => 'Supporting directory-based cache coherence in an object-addressed memory hierarchy'
[patent_app_type] => utility
[patent_app_number] => 10/782147
[patent_app_country] => US
[patent_app_date] => 2004-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3302
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/124/07124253.pdf
[firstpage_image] =>[orig_patent_app_number] => 10782147
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/782147 | Supporting directory-based cache coherence in an object-addressed memory hierarchy | Feb 17, 2004 | Issued |
Array
(
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[patent_doc_number] => 07155582
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-26
[patent_title] => 'Dynamic reordering of memory requests'
[patent_app_type] => utility
[patent_app_number] => 10/779705
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[patent_app_date] => 2004-02-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/779705 | Dynamic reordering of memory requests | Feb 17, 2004 | Issued |
Array
(
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[patent_doc_number] => 20050193240
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[patent_kind] => A1
[patent_issue_date] => 2005-09-01
[patent_title] => 'Dynamic reconfiguration of memory in a multi-cluster storage control unit'
[patent_app_type] => utility
[patent_app_number] => 10/781467
[patent_app_country] => US
[patent_app_date] => 2004-02-17
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[patent_drawing_sheets_cnt] => 5
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/781467 | Dynamic reconfiguration of memory in a multi-cluster storage control unit | Feb 16, 2004 | Issued |
Array
(
[id] => 7605727
[patent_doc_number] => 07099995
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-29
[patent_title] => 'Metadata access during error handling routines'
[patent_app_type] => utility
[patent_app_number] => 10/781200
[patent_app_country] => US
[patent_app_date] => 2004-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/07/099/07099995.pdf
[firstpage_image] =>[orig_patent_app_number] => 10781200
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/781200 | Metadata access during error handling routines | Feb 16, 2004 | Issued |
Array
(
[id] => 666967
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[patent_issue_date] => 2006-09-05
[patent_title] => 'Backup mechanism for a multi-class file system'
[patent_app_type] => utility
[patent_app_number] => 10/749334
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[patent_app_date] => 2003-12-31
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[patent_drawing_sheets_cnt] => 14
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[firstpage_image] =>[orig_patent_app_number] => 10749334
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/749334 | Backup mechanism for a multi-class file system | Dec 30, 2003 | Issued |
Array
(
[id] => 7261918
[patent_doc_number] => 20050144374
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[patent_kind] => A1
[patent_issue_date] => 2005-06-30
[patent_title] => 'Hardware detected command-per-clock'
[patent_app_type] => utility
[patent_app_number] => 10/749183
[patent_app_country] => US
[patent_app_date] => 2003-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0144/20050144374.pdf
[firstpage_image] =>[orig_patent_app_number] => 10749183
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/749183 | Hardware detected command-per-clock | Dec 29, 2003 | Issued |
Array
(
[id] => 690694
[patent_doc_number] => 07080212
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-07-18
[patent_title] => 'Closed loop adaptive prestage method, system, and product for prestaging cache blocks'
[patent_app_type] => utility
[patent_app_number] => 10/750101
[patent_app_country] => US
[patent_app_date] => 2003-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 3817
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[pdf_file] => patents/07/080/07080212.pdf
[firstpage_image] =>[orig_patent_app_number] => 10750101
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/750101 | Closed loop adaptive prestage method, system, and product for prestaging cache blocks | Dec 28, 2003 | Issued |
Array
(
[id] => 637493
[patent_doc_number] => 07130965
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-31
[patent_title] => 'Apparatus and method for store address for store address prefetch and line locking'
[patent_app_type] => utility
[patent_app_number] => 10/743134
[patent_app_country] => US
[patent_app_date] => 2003-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/07/130/07130965.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/743134 | Apparatus and method for store address for store address prefetch and line locking | Dec 22, 2003 | Issued |
Array
(
[id] => 705044
[patent_doc_number] => 07069382
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-06-27
[patent_title] => 'Method of RAID 5 write hole prevention'
[patent_app_type] => utility
[patent_app_number] => 10/743048
[patent_app_country] => US
[patent_app_date] => 2003-12-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/743048 | Method of RAID 5 write hole prevention | Dec 22, 2003 | Issued |
Array
(
[id] => 6999625
[patent_doc_number] => 20050138314
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[patent_kind] => A1
[patent_issue_date] => 2005-06-23
[patent_title] => 'Write-protected micro memory device'
[patent_app_type] => utility
[patent_app_number] => 10/743144
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/743144 | Write-protected micro memory device | Dec 22, 2003 | Abandoned |
Array
(
[id] => 5160987
[patent_doc_number] => 20070174031
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[patent_title] => 'Method and device for taking an access control policy decision'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/596769 | Method and device for taking an access control policy decision | Dec 22, 2003 | Abandoned |
Array
(
[id] => 7013514
[patent_doc_number] => 20050066138
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[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => 'Multiple storage element command queues'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/742949 | Multiple storage element command queues | Dec 22, 2003 | Issued |
Array
(
[id] => 7440277
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[patent_title] => 'Non-volatile mass storage cache coherency apparatus'
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Array
(
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Array
(
[id] => 1020899
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Array
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Array
(
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/659398 | Disk array apparatus and method for controlling the same | Sep 10, 2003 | Issued |