Search

Randall H. Gholson

Examiner (ID: 7575, Phone: (571)272-1011 , Office: P/2918 )

Most Active Art Unit
2918
Art Unit(s)
2918, 2915
Total Applications
3041
Issued Applications
3007
Pending Applications
0
Abandoned Applications
34

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17682683 [patent_doc_number] => 11366939 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-21 [patent_title] => Secure data transmission utilizing a set of obfuscated encoded data slices [patent_app_type] => utility [patent_app_number] => 17/247424 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 32 [patent_no_of_words] => 18802 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17247424 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/247424
Secure data transmission utilizing a set of obfuscated encoded data slices Dec 9, 2020 Issued
Array ( [id] => 17744382 [patent_doc_number] => 11392450 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-19 [patent_title] => Data integrity check for one-time programmable memory [patent_app_type] => utility [patent_app_number] => 17/247293 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9718 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17247293 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/247293
Data integrity check for one-time programmable memory Dec 6, 2020 Issued
Array ( [id] => 16780190 [patent_doc_number] => 20210117269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => SYSTEM AND METHOD FOR PROTECTING GPU MEMORY INSTRUCTIONS AGAINST FAULTS [patent_app_type] => utility [patent_app_number] => 17/113815 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7046 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17113815 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/113815
System and method for protecting GPU memory instructions against faults Dec 6, 2020 Issued
Array ( [id] => 17659273 [patent_doc_number] => 20220179738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => MANAGING PROBABILISTIC DATA INTEGRITY SCANS IN WORKLOADS WITH LOCALIZED READ PATTERNS [patent_app_type] => utility [patent_app_number] => 17/112014 [patent_app_country] => US [patent_app_date] => 2020-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17112014 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/112014
Managing probabilistic data integrity scans in workloads with localized read patterns Dec 3, 2020 Issued
Array ( [id] => 16722249 [patent_doc_number] => 20210089396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => SYSTEM AND METHOD FOR USING A DIRECTORY TO RECOVER A COHERENT SYSTEM FROM AN UNCORRECTABLE ERROR [patent_app_type] => utility [patent_app_number] => 17/111149 [patent_app_country] => US [patent_app_date] => 2020-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17111149 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/111149
System and method for using a directory to recover a coherent system from an uncorrectable error Dec 2, 2020 Issued
Array ( [id] => 17970084 [patent_doc_number] => 11487617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Memory component with error-detect-correct code interface [patent_app_type] => utility [patent_app_number] => 17/106663 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17106663 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/106663
Memory component with error-detect-correct code interface Nov 29, 2020 Issued
Array ( [id] => 16714125 [patent_doc_number] => 20210081272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SYSTEM FOR MEMORY ACCESS BANDWIDTH MANAGEMENT USING ECC [patent_app_type] => utility [patent_app_number] => 17/105664 [patent_app_country] => US [patent_app_date] => 2020-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17105664 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/105664
System for memory access bandwidth management using ECC Nov 26, 2020 Issued
Array ( [id] => 16690590 [patent_doc_number] => 20210073068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => WRITE BUFFER MANAGEMENT [patent_app_type] => utility [patent_app_number] => 17/100571 [patent_app_country] => US [patent_app_date] => 2020-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17100571 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/100571
Write buffer management Nov 19, 2020 Issued
Array ( [id] => 17758537 [patent_doc_number] => 11398840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => System, method, and apparatus for interleaving data [patent_app_type] => utility [patent_app_number] => 17/099051 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 5362 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099051 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099051
System, method, and apparatus for interleaving data Nov 15, 2020 Issued
Array ( [id] => 17515750 [patent_doc_number] => 11294902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Storing data and parity in computing devices [patent_app_type] => utility [patent_app_number] => 17/091195 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 40 [patent_no_of_words] => 12349 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17091195 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/091195
Storing data and parity in computing devices Nov 5, 2020 Issued
Array ( [id] => 16661555 [patent_doc_number] => 20210058192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => HIGH PERFORMANCE, FLEXIBLE, AND COMPACT LOW-DENSITY PARITY-CHECK (LDPC) CODE [patent_app_type] => utility [patent_app_number] => 17/090498 [patent_app_country] => US [patent_app_date] => 2020-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27161 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17090498 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/090498
High performance, flexible, and compact low-density parity-check (LDPC) code Nov 4, 2020 Issued
Array ( [id] => 16690596 [patent_doc_number] => 20210073074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => METHOD AND APPARATUS FOR PERFORMING DYNAMIC RECOVERY MANAGEMENT REGARDING REDUNDANT ARRAY OF INDEPENDENT DISKS [patent_app_type] => utility [patent_app_number] => 17/084650 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17084650 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/084650
Method and apparatus for performing dynamic recovery management regarding redundant array of independent disks Oct 29, 2020 Issued
Array ( [id] => 18480241 [patent_doc_number] => 11693983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Data protection via commutative erasure coding in a geographically diverse data storage system [patent_app_type] => utility [patent_app_number] => 17/083135 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 18023 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17083135 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/083135
Data protection via commutative erasure coding in a geographically diverse data storage system Oct 27, 2020 Issued
Array ( [id] => 18015157 [patent_doc_number] => 11507454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Identifying non-correctable errors using error pattern analysis [patent_app_type] => utility [patent_app_number] => 17/080126 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9737 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17080126 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/080126
Identifying non-correctable errors using error pattern analysis Oct 25, 2020 Issued
Array ( [id] => 18884685 [patent_doc_number] => 20240008054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => METHOD AND APPARATUS FOR HYBRID AUTOMATIC RETRANSMISSION REQUEST [patent_app_type] => utility [patent_app_number] => 18/250075 [patent_app_country] => US [patent_app_date] => 2020-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10430 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18250075 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/250075
Method and apparatus for hybrid automatic retransmission request Oct 21, 2020 Issued
Array ( [id] => 19400317 [patent_doc_number] => 12074715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Jitter control with hybrid automatic repeat request process [patent_app_type] => utility [patent_app_number] => 18/033116 [patent_app_country] => US [patent_app_date] => 2020-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 11366 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18033116 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/033116
Jitter control with hybrid automatic repeat request process Oct 20, 2020 Issued
Array ( [id] => 17543904 [patent_doc_number] => 11309036 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-04-19 [patent_title] => Systems and methods of implementing a calibration wordline to compensate for voltage threshold shift in NAND flash memory [patent_app_type] => utility [patent_app_number] => 17/070590 [patent_app_country] => US [patent_app_date] => 2020-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8242 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17070590 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/070590
Systems and methods of implementing a calibration wordline to compensate for voltage threshold shift in NAND flash memory Oct 13, 2020 Issued
Array ( [id] => 19734335 [patent_doc_number] => 12212343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Efficient codec for electrical signals [patent_app_type] => utility [patent_app_number] => 18/246446 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3484 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18246446 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/246446
Efficient codec for electrical signals Sep 27, 2020 Issued
Array ( [id] => 17484449 [patent_doc_number] => 20220091953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => READ RETRY THRESHOLD OPTIMIZATION SYSTEMS AND METHODS CONDITIONED ON PREVIOUS READS [patent_app_type] => utility [patent_app_number] => 17/026544 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17026544 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/026544
Read retry threshold optimization systems and methods conditioned on previous reads Sep 20, 2020 Issued
Array ( [id] => 17999613 [patent_doc_number] => 11500720 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Apparatus and method for controlling input/output throughput of a memory system [patent_app_type] => utility [patent_app_number] => 17/027051 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 17397 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17027051 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/027051
Apparatus and method for controlling input/output throughput of a memory system Sep 20, 2020 Issued
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