Search

Randy Boyer

Examiner (ID: 462, Phone: (571)272-7113 , Office: P/1771 )

Most Active Art Unit
1771
Art Unit(s)
1797, 1771, 1764
Total Applications
1281
Issued Applications
865
Pending Applications
112
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20557123 [patent_doc_number] => 20260056909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-26 [patent_title] => Multi-Protocol Retimer Enabling Transparent and Non-Transparent Bridging for Memory Fabrics including PCIe, CXL, or UALink [patent_app_type] => utility [patent_app_number] => 19/371994 [patent_app_country] => US [patent_app_date] => 2025-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 193792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19371994 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/371994
Multi-protocol retimer enabling transparent and non-transparent bridging for memory fabrics including PCIe, CXL, or UALink Oct 27, 2025 Issued
Array ( [id] => 20635790 [patent_doc_number] => 12596664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Data processing method and electronic device using dma [patent_app_type] => utility [patent_app_number] => 19/088830 [patent_app_country] => US [patent_app_date] => 2025-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8339 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19088830 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/088830
Data processing method and electronic device using dma Mar 23, 2025 Issued
Array ( [id] => 20447088 [patent_doc_number] => 20260003810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => DATA PROCESSING METHOD AND ELECTRONIC DEVICE USING SCATTER GATHER DMA [patent_app_type] => utility [patent_app_number] => 19/079258 [patent_app_country] => US [patent_app_date] => 2025-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5885 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 399 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19079258 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/079258
DATA PROCESSING METHOD AND ELECTRONIC DEVICE USING SCATTER GATHER DMA Mar 12, 2025 Pending
Array ( [id] => 20035068 [patent_doc_number] => 20250173290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => COMMUNICATION CONTROLLER AND COMMUNICATION CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 19/039893 [patent_app_country] => US [patent_app_date] => 2025-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19039893 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/039893
COMMUNICATION CONTROLLER AND COMMUNICATION CONTROL METHOD Jan 28, 2025 Pending
Array ( [id] => 20035083 [patent_doc_number] => 20250173305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => CRYPTOCURRENCY MINER AND MULTICAST READ [patent_app_type] => utility [patent_app_number] => 19/036700 [patent_app_country] => US [patent_app_date] => 2025-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19036700 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/036700
CRYPTOCURRENCY MINER AND MULTICAST READ Jan 23, 2025 Pending
Array ( [id] => 20281945 [patent_doc_number] => 20250307187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => NETWORK CONTROLLER AND NETWORK CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 19/034733 [patent_app_country] => US [patent_app_date] => 2025-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1118 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19034733 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/034733
NETWORK CONTROLLER AND NETWORK CONTROL METHOD Jan 22, 2025 Pending
Array ( [id] => 20500730 [patent_doc_number] => 20260030191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => SYSTEM AND METHODS FOR DYNAMIC MIGRATION OF ENDPOINTS ACROSS PCIe HOSTS [patent_app_type] => utility [patent_app_number] => 19/026746 [patent_app_country] => US [patent_app_date] => 2025-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19026746 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/026746
SYSTEM AND METHODS FOR DYNAMIC MIGRATION OF ENDPOINTS ACROSS PCIe HOSTS Jan 16, 2025 Pending
Array ( [id] => 20790497 [patent_doc_number] => 12664413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => Methods for an AI accelerator integrated circuit chip with integrated cell-based fabric adapter [patent_app_type] => utility [patent_app_number] => 18/989525 [patent_app_country] => US [patent_app_date] => 2024-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 23215 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18989525 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/989525
METHODS FOR AN AI ACCELERATOR INTEGRATED CIRCUIT CHIP WITH INTEGRATED CELL-BASED FABRIC ADAPTER Dec 19, 2024 Issued
Array ( [id] => 20070806 [patent_doc_number] => 20250209028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => MEMORY SYSTEM WITH SELECTIVELY INTERFACEABLE MEMORY SUBSYSTEM [patent_app_type] => utility [patent_app_number] => 18/988683 [patent_app_country] => US [patent_app_date] => 2024-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18988683 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/988683
MEMORY SYSTEM WITH SELECTIVELY INTERFACEABLE MEMORY SUBSYSTEM Dec 18, 2024 Pending
Array ( [id] => 19849023 [patent_doc_number] => 20250094374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => NAND SWITCH [patent_app_type] => utility [patent_app_number] => 18/972748 [patent_app_country] => US [patent_app_date] => 2024-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7279 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18972748 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/972748
NAND SWITCH Dec 5, 2024 Pending
Array ( [id] => 19849024 [patent_doc_number] => 20250094375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => APPARATUS AND METHOD FOR TRAINING DEVICE-TO-DEVICE PHYSICAL INTERFACE [patent_app_type] => utility [patent_app_number] => 18/965046 [patent_app_country] => US [patent_app_date] => 2024-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18965046 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/965046
APPARATUS AND METHOD FOR TRAINING DEVICE-TO-DEVICE PHYSICAL INTERFACE Dec 1, 2024 Pending
Array ( [id] => 20043319 [patent_doc_number] => 20250181541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => TRANSMISSION LINE DEVICE, LUMINOUS TRANSMISSION LINE SYSTEM AND LIGHT CONTROL SIGNAL EXTENDING INTERFACE [patent_app_type] => utility [patent_app_number] => 18/962167 [patent_app_country] => US [patent_app_date] => 2024-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18962167 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/962167
TRANSMISSION LINE DEVICE, LUMINOUS TRANSMISSION LINE SYSTEM AND LIGHT CONTROL SIGNAL EXTENDING INTERFACE Nov 26, 2024 Pending
Array ( [id] => 20035065 [patent_doc_number] => 20250173287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => FILTER DEVICE AND METHOD FOR COMMUNICATION BETWEEN A TRUSTED DOMAIN AND AN UNTRUSTED DOMAIN, AND COMPUTER SYSTEM [patent_app_type] => utility [patent_app_number] => 18/961979 [patent_app_country] => US [patent_app_date] => 2024-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18961979 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/961979
FILTER DEVICE AND METHOD FOR COMMUNICATION BETWEEN A TRUSTED DOMAIN AND AN UNTRUSTED DOMAIN, AND COMPUTER SYSTEM Nov 26, 2024 Pending
Array ( [id] => 20043316 [patent_doc_number] => 20250181538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => CHIPLET HAVING SAVE AND FORWARD MODULE [patent_app_type] => utility [patent_app_number] => 18/939165 [patent_app_country] => US [patent_app_date] => 2024-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939165 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/939165
CHIPLET HAVING SAVE AND FORWARD MODULE Nov 5, 2024 Pending
Array ( [id] => 20595373 [patent_doc_number] => 12579090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-17 [patent_title] => Method and system for shifting data within memory [patent_app_type] => utility [patent_app_number] => 18/936875 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7245 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936875 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936875
Method and system for shifting data within memory Nov 3, 2024 Issued
Array ( [id] => 20659329 [patent_doc_number] => 20260111373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-23 [patent_title] => PROCESSING INPUT/OUTPUT REQUESTS [patent_app_type] => utility [patent_app_number] => 18/924232 [patent_app_country] => US [patent_app_date] => 2024-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18924232 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/924232
PROCESSING INPUT/OUTPUT REQUESTS Oct 22, 2024 Pending
Array ( [id] => 20580235 [patent_doc_number] => 12572486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-10 [patent_title] => Subgraph segmented optimization method based on inter-core storage access, and application [patent_app_type] => utility [patent_app_number] => 18/901294 [patent_app_country] => US [patent_app_date] => 2024-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2270 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 528 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18901294 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/901294
Subgraph segmented optimization method based on inter-core storage access, and application Sep 29, 2024 Issued
Array ( [id] => 20659341 [patent_doc_number] => 20260111385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-23 [patent_title] => PCIE DEVICE DETECTION SYSTEM, METHOD AND APPARATUS, AND PRODUCT [patent_app_type] => utility [patent_app_number] => 19/469517 [patent_app_country] => US [patent_app_date] => 2024-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19469517 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/469517
PCIE DEVICE DETECTION SYSTEM, METHOD AND APPARATUS, AND PRODUCT Sep 26, 2024 Pending
Array ( [id] => 19864729 [patent_doc_number] => 20250103515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => Dynamic Precision Control System for Peripheral Data Output with ResistiveSensors [patent_app_type] => utility [patent_app_number] => 18/896686 [patent_app_country] => US [patent_app_date] => 2024-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 350 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18896686 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/896686
Dynamic Precision Control System for Peripheral Data Output with ResistiveSensors Sep 24, 2024 Pending
Array ( [id] => 20601857 [patent_doc_number] => 20260079867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-19 [patent_title] => ITERATIVE DIRECT MEMORY ACCESS FOR CACHE-FRIENDLY WRITE OUT [patent_app_type] => utility [patent_app_number] => 18/887784 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18887784 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/887784
ITERATIVE DIRECT MEMORY ACCESS FOR CACHE-FRIENDLY WRITE OUT Sep 16, 2024 Pending
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