Rashid A. Alam

Array ( [id] => 17899113 [patent_doc_number] => 20220308775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => METHOD, DEVICE, AND PROGRAM PRODUCT FOR CREATING STRIPE BASED ON DYNAMIC WINDOW [patent_app_type] => utility [patent_app_number] => 17/475951 [patent_app_country] => US [patent_app_date] => 2021-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475951 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18414902 [patent_doc_number] => 11669444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Computing system and method for controlling storage device [patent_app_type] => utility [patent_app_number] => 17/475025 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 49 [patent_no_of_words] => 20537 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17401658 [patent_doc_number] => 20220043748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => METHOD, APPARATUS, AND SYSTEM FOR RUN-TIME CHECKING OF MEMORY TAGS IN A PROCESSOR-BASED SYSTEM [patent_app_type] => utility [patent_app_number] => 17/393715 [patent_app_country] => US [patent_app_date] => 2021-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7775 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393715 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18386219 [patent_doc_number] => 11657000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Controller and memory system including the same [patent_app_type] => utility [patent_app_number] => 17/443727 [patent_app_country] => US [patent_app_date] => 2021-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8881 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17443727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18234902 [patent_doc_number] => 11599461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Cache memory architecture and management [patent_app_type] => utility [patent_app_number] => 17/385257 [patent_app_country] => US [patent_app_date] => 2021-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6049 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17385257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17216295 [patent_doc_number] => 20210349633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => DYNAMIC PROCESSING OF STORAGE COMMAND BASED ON INTERNAL OPERATIONS OF STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/382019 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382019 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19627666 [patent_doc_number] => 12166524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Profile-based direct memory access for transceiver reconfiguration [patent_app_type] => utility [patent_app_number] => 18/022735 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18022735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17809511 [patent_doc_number] => 20220261346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/372009 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17372009 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17892268 [patent_doc_number] => 11455239 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-27 [patent_title] => Memory reduction in a system by oversubscribing physical memory shared by compute entities supported by the system [patent_app_type] => utility [patent_app_number] => 17/367061 [patent_app_country] => US [patent_app_date] => 2021-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12718 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17367061 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17172374 [patent_doc_number] => 20210326044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => SUPPLEMENTAL AI PROCESSING IN MEMORY [patent_app_type] => utility [patent_app_number] => 17/365712 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18111611 [patent_doc_number] => 20230004491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => APPROACH FOR REDUCING SIDE EFFECTS OF COMPUTATION OFFLOAD TO MEMORY [patent_app_type] => utility [patent_app_number] => 17/364854 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364854 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18174185 [patent_doc_number] => 11573897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Hybrid memory module [patent_app_type] => utility [patent_app_number] => 17/364722 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4925 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364722 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18174184 [patent_doc_number] => 11573896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => DRAM caching storage class memory [patent_app_type] => utility [patent_app_number] => 17/358216 [patent_app_country] => US [patent_app_date] => 2021-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8889 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17358216 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17143862 [patent_doc_number] => 20210311875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => PREFETCHING DATA FOR APPLICATION USAGE [patent_app_type] => utility [patent_app_number] => 17/345855 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8593 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345855 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17128888 [patent_doc_number] => 20210303657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => METHOD FOR WRITING DIGITAL CONTENTS TO A PLURALITY OF STORAGE CARDS AND THE SYSTEM FOR THE SAME [patent_app_type] => utility [patent_app_number] => 17/343770 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1427 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17343770 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17098755 [patent_doc_number] => 20210286546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => PROVIDING APPLICATION AWARE STORAGE [patent_app_type] => utility [patent_app_number] => 17/326969 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326969 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18630401 [patent_doc_number] => 20230289294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => APPARATUS AND METHOD [patent_app_type] => utility [patent_app_number] => 17/999649 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17999649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19107302 [patent_doc_number] => 11960406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Omitting processor-based logging of separately obtainable memory values during program tracing [patent_app_type] => utility [patent_app_number] => 17/921053 [patent_app_country] => US [patent_app_date] => 2021-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 14076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17921053 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17962242 [patent_doc_number] => 20220342823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => CACHE READ CONTEXT SWITCHING IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 17/302067 [patent_app_country] => US [patent_app_date] => 2021-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17302067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17832300 [patent_doc_number] => 20220269604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => CACHE-BASED TRACE LOGGING USING TAGS IN AN UPPER-LEVEL CACHE [patent_app_type] => utility [patent_app_number] => 17/229645 [patent_app_country] => US [patent_app_date] => 2021-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13688 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17229645 [rel_patent_id] =>[rel_patent_doc_number] =>)