
Rashid A. Alam
Examiner (ID: 16828, Phone: (571)270-3959 , Office: P/1721 )
| Most Active Art Unit | 1721 |
| Art Unit(s) | 1795, 1747, 1722, 1721 |
| Total Applications | 526 |
| Issued Applications | 361 |
| Pending Applications | 0 |
| Abandoned Applications | 164 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19108683
[patent_doc_number] => 11961797
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-16
[patent_title] => Semiconductor package and fabricating method thereof
[patent_app_type] => utility
[patent_app_number] => 17/468981
[patent_app_country] => US
[patent_app_date] => 2021-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 42
[patent_no_of_words] => 14052
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468981
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/468981 | Semiconductor package and fabricating method thereof | Sep 7, 2021 | Issued |
Array
(
[id] => 17709143
[patent_doc_number] => 20220209151
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-30
[patent_title] => TRANSPARENT ELECTRODE, PROCESS FOR PRODUCING TRANSPARENT ELECTRODE, AND PHOTOELECTRIC CONVERSION DEVICE COMPRISING TRANSPARENT ELECTRODE
[patent_app_type] => utility
[patent_app_number] => 17/469723
[patent_app_country] => US
[patent_app_date] => 2021-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5464
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469723
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/469723 | Transparent electrode, process for producing transparent electrode, and photoelectric conversion device comprising transparent electrode | Sep 7, 2021 | Issued |
Array
(
[id] => 19108760
[patent_doc_number] => 11961874
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-16
[patent_title] => Display device and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/447177
[patent_app_country] => US
[patent_app_date] => 2021-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 29
[patent_no_of_words] => 19521
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447177
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/447177 | Display device and method of manufacturing the same | Sep 7, 2021 | Issued |
Array
(
[id] => 17908776
[patent_doc_number] => 11462640
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-04
[patent_title] => LDMOS transistor having vertical floating field plate and manufacture thereof
[patent_app_type] => utility
[patent_app_number] => 17/468389
[patent_app_country] => US
[patent_app_date] => 2021-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3677
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468389
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/468389 | LDMOS transistor having vertical floating field plate and manufacture thereof | Sep 6, 2021 | Issued |
Array
(
[id] => 18892767
[patent_doc_number] => 11871560
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-09
[patent_title] => Method for manufacturing semiconductor structure and semiconductor structure
[patent_app_type] => utility
[patent_app_number] => 17/468469
[patent_app_country] => US
[patent_app_date] => 2021-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5775
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468469
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/468469 | Method for manufacturing semiconductor structure and semiconductor structure | Sep 6, 2021 | Issued |
Array
(
[id] => 17303184
[patent_doc_number] => 20210399023
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-23
[patent_title] => ARRAY SUBSTRATE, DISPLAY PANEL, AND DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/466666
[patent_app_country] => US
[patent_app_date] => 2021-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8014
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17466666
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/466666 | Array substrate, display panel, and display apparatus | Sep 2, 2021 | Issued |
Array
(
[id] => 19237552
[patent_doc_number] => 20240194747
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => METAL-OXIDE THIN-FILM TRANSISTOR AND METHOD FOR FABRICATING SAME, DISPLAY PANEL, AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/907839
[patent_app_country] => US
[patent_app_date] => 2021-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13479
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17907839
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/907839 | Metal-oxide thin-film transistor and method for fabricating same, display panel, and display device | Aug 30, 2021 | Issued |
Array
(
[id] => 18920379
[patent_doc_number] => 11882689
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-23
[patent_title] => Memory and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/460436
[patent_app_country] => US
[patent_app_date] => 2021-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 5489
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460436
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/460436 | Memory and manufacturing method thereof | Aug 29, 2021 | Issued |
Array
(
[id] => 17855320
[patent_doc_number] => 20220285363
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-08
[patent_title] => Memory and Fabricating Method Thereof
[patent_app_type] => utility
[patent_app_number] => 17/460988
[patent_app_country] => US
[patent_app_date] => 2021-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8654
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460988
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/460988 | Memory and fabricating method thereof | Aug 29, 2021 | Issued |
Array
(
[id] => 18222906
[patent_doc_number] => 20230061900
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-02
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/461855
[patent_app_country] => US
[patent_app_date] => 2021-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5461
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461855
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/461855 | Semiconductor device and method for forming the same | Aug 29, 2021 | Issued |
Array
(
[id] => 17295497
[patent_doc_number] => 20210391336
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-16
[patent_title] => BIT LINE LEAD-OUT STRUCTURE AND PREPARATION METHOD THEREFOR
[patent_app_type] => utility
[patent_app_number] => 17/445948
[patent_app_country] => US
[patent_app_date] => 2021-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5511
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17445948
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/445948 | Bit line lead-out structure and preparation method therefor | Aug 24, 2021 | Issued |
Array
(
[id] => 17676965
[patent_doc_number] => 20220190132
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-16
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/406162
[patent_app_country] => US
[patent_app_date] => 2021-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8851
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406162
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/406162 | Semiconductor device | Aug 18, 2021 | Issued |
Array
(
[id] => 18447147
[patent_doc_number] => 11682724
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-20
[patent_title] => High voltage transistor structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/406028
[patent_app_country] => US
[patent_app_date] => 2021-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4463
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406028
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/406028 | High voltage transistor structure and manufacturing method thereof | Aug 17, 2021 | Issued |
Array
(
[id] => 17615546
[patent_doc_number] => 20220157826
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-19
[patent_title] => SEMICONDUCTOR STRUCTURE MANUFACTURING METHOD AND SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/401606
[patent_app_country] => US
[patent_app_date] => 2021-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9123
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401606
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/401606 | Semiconductor structure manufacturing method and semiconductor structure | Aug 12, 2021 | Issued |
Array
(
[id] => 19108776
[patent_doc_number] => 11961890
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-16
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/400594
[patent_app_country] => US
[patent_app_date] => 2021-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 6380
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400594
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/400594 | Semiconductor device and method for manufacturing the same | Aug 11, 2021 | Issued |
Array
(
[id] => 19031260
[patent_doc_number] => 11930635
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-12
[patent_title] => Semiconductor structure and method of manufacturing same
[patent_app_type] => utility
[patent_app_number] => 17/399062
[patent_app_country] => US
[patent_app_date] => 2021-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 6429
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17399062
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/399062 | Semiconductor structure and method of manufacturing same | Aug 10, 2021 | Issued |
Array
(
[id] => 18661565
[patent_doc_number] => 20230307579
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-28
[patent_title] => ACTIVATION OF P-TYPE LAYERS OF TUNNEL JUNCTIONS
[patent_app_type] => utility
[patent_app_number] => 18/041269
[patent_app_country] => US
[patent_app_date] => 2021-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6401
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18041269
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/041269 | ACTIVATION OF P-TYPE LAYERS OF TUNNEL JUNCTIONS | Aug 10, 2021 | Pending |
Array
(
[id] => 18331889
[patent_doc_number] => 11637147
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-04-25
[patent_title] => Imaging device
[patent_app_type] => utility
[patent_app_number] => 17/394091
[patent_app_country] => US
[patent_app_date] => 2021-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 13027
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394091
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/394091 | Imaging device | Aug 3, 2021 | Issued |
Array
(
[id] => 18167451
[patent_doc_number] => 20230034058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-02
[patent_title] => INTEGRATED CONTACT SILICIDE WITH TUNABLE WORK FUNCTIONS
[patent_app_type] => utility
[patent_app_number] => 17/389772
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6641
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389772
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389772 | Integrated contact silicide with tunable work functions | Jul 29, 2021 | Issued |
Array
(
[id] => 19584146
[patent_doc_number] => 12150293
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-19
[patent_title] => Bit line structure, manufacturing method thereof and semiconductor memory
[patent_app_type] => utility
[patent_app_number] => 17/386765
[patent_app_country] => US
[patent_app_date] => 2021-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 4399
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17386765
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/386765 | Bit line structure, manufacturing method thereof and semiconductor memory | Jul 27, 2021 | Issued |