Search

Raymond A. Nelli

Examiner (ID: 18728)

Most Active Art Unit
3402
Art Unit(s)
3727, 3402, 3747, 3106
Total Applications
2167
Issued Applications
1957
Pending Applications
23
Abandoned Applications
187

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17528643 [patent_doc_number] => 11301331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Storage device and operating method of storage device [patent_app_type] => utility [patent_app_number] => 16/529320 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10899 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529320 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/529320
Storage device and operating method of storage device Jul 31, 2019 Issued
Array ( [id] => 16600028 [patent_doc_number] => 20210026559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => Dynamic and Adaptive Data Read Request Scheduling [patent_app_type] => utility [patent_app_number] => 16/522505 [patent_app_country] => US [patent_app_date] => 2019-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4684 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16522505 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/522505
Dynamic and adaptive data read request scheduling Jul 24, 2019 Issued
Array ( [id] => 16520698 [patent_doc_number] => 10871913 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-22 [patent_title] => Method and system for processing data in a replication system [patent_app_type] => utility [patent_app_number] => 16/516295 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4529 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16516295 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/516295
Method and system for processing data in a replication system Jul 18, 2019 Issued
Array ( [id] => 16772724 [patent_doc_number] => 10983829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Dynamic size of static SLC cache [patent_app_type] => utility [patent_app_number] => 16/510526 [patent_app_country] => US [patent_app_date] => 2019-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 12240 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16510526 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/510526
Dynamic size of static SLC cache Jul 11, 2019 Issued
Array ( [id] => 16894864 [patent_doc_number] => 11036414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Data storage device and control method for non-volatile memory with high-efficiency garbage collection [patent_app_type] => utility [patent_app_number] => 16/505192 [patent_app_country] => US [patent_app_date] => 2019-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5214 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16505192 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/505192
Data storage device and control method for non-volatile memory with high-efficiency garbage collection Jul 7, 2019 Issued
Array ( [id] => 17164955 [patent_doc_number] => 11151054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Speculative address translation requests pertaining to instruction cache misses [patent_app_type] => utility [patent_app_number] => 16/455116 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5454 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455116 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455116
Speculative address translation requests pertaining to instruction cache misses Jun 26, 2019 Issued
Array ( [id] => 14997885 [patent_doc_number] => 20190317900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => INVALIDATION DATA AREA FOR CACHE [patent_app_type] => utility [patent_app_number] => 16/455635 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6882 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455635 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455635
Invalidation data area for cache Jun 26, 2019 Issued
Array ( [id] => 14901145 [patent_doc_number] => 20190294338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SELECTING PAGES IMPLEMENTING LEAF NODES AND INTERNAL NODES OF A DATA SET INDEX FOR REUSE [patent_app_type] => utility [patent_app_number] => 16/439601 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439601 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439601
Selecting pages implementing leaf nodes and internal nodes of a data set index for reuse Jun 11, 2019 Issued
Array ( [id] => 16278711 [patent_doc_number] => 10761740 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-01 [patent_title] => Hierarchical memory wear leveling employing a mapped translation layer [patent_app_type] => utility [patent_app_number] => 16/421353 [patent_app_country] => US [patent_app_date] => 2019-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11363 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16421353 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/421353
Hierarchical memory wear leveling employing a mapped translation layer May 22, 2019 Issued
Array ( [id] => 16834059 [patent_doc_number] => 11010311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Processing device and method for controlling processing device [patent_app_type] => utility [patent_app_number] => 16/391698 [patent_app_country] => US [patent_app_date] => 2019-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7375 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16391698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/391698
Processing device and method for controlling processing device Apr 22, 2019 Issued
Array ( [id] => 16942776 [patent_doc_number] => 11055015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Fine-grain asynchronous mirroring suppression [patent_app_type] => utility [patent_app_number] => 16/385675 [patent_app_country] => US [patent_app_date] => 2019-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5298 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16385675 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/385675
Fine-grain asynchronous mirroring suppression Apr 15, 2019 Issued
Array ( [id] => 16378217 [patent_doc_number] => 20200327059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => MAINTAINING DATA ORDER BETWEEN BUFFERS [patent_app_type] => utility [patent_app_number] => 16/383705 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383705 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/383705
Maintaining data order between buffers Apr 14, 2019 Issued
Array ( [id] => 15090147 [patent_doc_number] => 20190339884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => Supply Chips and Methods for Restricting Read Access Thereof [patent_app_type] => utility [patent_app_number] => 16/384580 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16384580 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/384580
Supply Chips and Methods for Restricting Read Access Thereof Apr 14, 2019 Abandoned
Array ( [id] => 15091121 [patent_doc_number] => 20190340372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => Methods for Restricting Read Access to Supply Chips [patent_app_type] => utility [patent_app_number] => 16/384564 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16384564 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/384564
Methods for restricting read access to supply chips Apr 14, 2019 Issued
Array ( [id] => 16644164 [patent_doc_number] => 10922020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Writing and querying operations in content addressable memory systems with content addressable memory buffers [patent_app_type] => utility [patent_app_number] => 16/382511 [patent_app_country] => US [patent_app_date] => 2019-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8562 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16382511 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/382511
Writing and querying operations in content addressable memory systems with content addressable memory buffers Apr 11, 2019 Issued
Array ( [id] => 16330874 [patent_doc_number] => 20200301840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => PREFETCH APPARATUS AND METHOD USING CONFIDENCE METRIC FOR PROCESSOR CACHE [patent_app_type] => utility [patent_app_number] => 16/358792 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16358792 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/358792
PREFETCH APPARATUS AND METHOD USING CONFIDENCE METRIC FOR PROCESSOR CACHE Mar 19, 2019 Abandoned
Array ( [id] => 15981999 [patent_doc_number] => 10671327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Method for determining selection and ordering of storage volumes to compress [patent_app_type] => utility [patent_app_number] => 16/296987 [patent_app_country] => US [patent_app_date] => 2019-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11582 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16296987 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/296987
Method for determining selection and ordering of storage volumes to compress Mar 7, 2019 Issued
Array ( [id] => 14539245 [patent_doc_number] => 20190205244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => MEMORY SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCTS [patent_app_type] => utility [patent_app_number] => 16/290810 [patent_app_country] => US [patent_app_date] => 2019-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 184471 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -58 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16290810 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/290810
MEMORY SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCTS Feb 28, 2019 Abandoned
Array ( [id] => 14448881 [patent_doc_number] => 20190182314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => MODULAR DEVICE AND METHOD OF OPERATION [patent_app_type] => utility [patent_app_number] => 16/276069 [patent_app_country] => US [patent_app_date] => 2019-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12406 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16276069 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/276069
MODULAR DEVICE AND METHOD OF OPERATION Feb 13, 2019 Abandoned
Array ( [id] => 15700615 [patent_doc_number] => 10606483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Buffering device with status communication method for memory controller [patent_app_type] => utility [patent_app_number] => 16/266216 [patent_app_country] => US [patent_app_date] => 2019-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3088 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16266216 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/266216
Buffering device with status communication method for memory controller Feb 3, 2019 Issued
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