Search

Raymond Ngan Phan

Examiner (ID: 5752, Phone: (571)272-3630 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2111, 2175, 2186, 2185, 2305, 2781, 2181, 2787
Total Applications
1868
Issued Applications
1698
Pending Applications
98
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9300215 [patent_doc_number] => 08648446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-11 [patent_title] => 'Method for protecting a gate structure during contact formation' [patent_app_type] => utility [patent_app_number] => 13/944335 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6177 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13944335 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/944335
Method for protecting a gate structure during contact formation Jul 16, 2013 Issued
Array ( [id] => 9621378 [patent_doc_number] => 08791553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-29 [patent_title] => 'Multilayer select devices and methods related thereto' [patent_app_type] => utility [patent_app_number] => 13/941129 [patent_app_country] => US [patent_app_date] => 2013-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3256 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13941129 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/941129
Multilayer select devices and methods related thereto Jul 11, 2013 Issued
Array ( [id] => 9626407 [patent_doc_number] => 08796085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Vertical super-thin body semiconductor on dielectric wall devices and methods of their fabrication' [patent_app_type] => utility [patent_app_number] => 13/940197 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 83 [patent_no_of_words] => 19120 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13940197 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/940197
Vertical super-thin body semiconductor on dielectric wall devices and methods of their fabrication Jul 10, 2013 Issued
Array ( [id] => 9648494 [patent_doc_number] => 08802504 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-12 [patent_title] => '3D packages and methods for forming the same' [patent_app_type] => utility [patent_app_number] => 13/938939 [patent_app_country] => US [patent_app_date] => 2013-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 7844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13938939 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/938939
3D packages and methods for forming the same Jul 9, 2013 Issued
Array ( [id] => 9306648 [patent_doc_number] => 20140045322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/937893 [patent_app_country] => US [patent_app_date] => 2013-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13665 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13937893 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/937893
Method for manufacturing silicon carbide semiconductor device Jul 8, 2013 Issued
Array ( [id] => 9375618 [patent_doc_number] => 08679881 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-03-25 [patent_title] => 'Growth method for reducing defect density of gallium nitride' [patent_app_type] => utility [patent_app_number] => 13/934846 [patent_app_country] => US [patent_app_date] => 2013-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2002 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13934846 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/934846
Growth method for reducing defect density of gallium nitride Jul 2, 2013 Issued
Array ( [id] => 10142374 [patent_doc_number] => 09175173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Unlocking layer and method' [patent_app_type] => utility [patent_app_number] => 13/927984 [patent_app_country] => US [patent_app_date] => 2013-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 16455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13927984 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/927984
Unlocking layer and method Jun 25, 2013 Issued
Array ( [id] => 10964754 [patent_doc_number] => 20140367786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'FLEXIBLE, STRETCHABLE ELECTRONIC DEVICES' [patent_app_type] => utility [patent_app_number] => 13/917302 [patent_app_country] => US [patent_app_date] => 2013-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4782 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13917302 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/917302
Flexible, stretchable electronic devices Jun 12, 2013 Issued
Array ( [id] => 9944084 [patent_doc_number] => 08993384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'Semiconductor device and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 13/913511 [patent_app_country] => US [patent_app_date] => 2013-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4685 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13913511 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/913511
Semiconductor device and fabrication method thereof Jun 8, 2013 Issued
Array ( [id] => 10950819 [patent_doc_number] => 20140353840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'STACKED MICROELECTRONIC PACKAGES HAVING SIDEWALL CONDUCTORS AND METHODS FOR THE FABRICATION THEREOF' [patent_app_type] => utility [patent_app_number] => 13/906621 [patent_app_country] => US [patent_app_date] => 2013-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13906621 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/906621
Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof May 30, 2013 Issued
Array ( [id] => 9068783 [patent_doc_number] => 20130260539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'VAPOR DEPOSITION REACTOR FOR FORMING THIN FILM' [patent_app_type] => utility [patent_app_number] => 13/904790 [patent_app_country] => US [patent_app_date] => 2013-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7934 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13904790 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/904790
Vapor deposition reactor for forming thin film May 28, 2013 Issued
Array ( [id] => 9051150 [patent_doc_number] => 20130248864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'DIE TESTING USING TOP SURFACE TEST PADS' [patent_app_type] => utility [patent_app_number] => 13/894051 [patent_app_country] => US [patent_app_date] => 2013-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5737 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13894051 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/894051
Test circuitry coupled to embedded circuit input/output unconnected to pads May 13, 2013 Issued
Array ( [id] => 10247882 [patent_doc_number] => 20150132878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-14 [patent_title] => 'METHOD FOR MANUFACTURING ORGANIC EL ELEMENT, ORGANIC EL ELEMENT, ORGANIC EL DISPLAY PANEL, ORGANIC EL DISPLAY APPARATUS, AND ORGANIC EL LIGHT-EMITTING APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/348103 [patent_app_country] => US [patent_app_date] => 2013-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 16925 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14348103 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/348103
Method for manufacturing organic EL element, organic EL element, organic EL display panel, organic EL display apparatus, and organic EL light-emitting apparatus May 8, 2013 Issued
Array ( [id] => 9582744 [patent_doc_number] => 08772747 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Composite target sputtering for forming doped phase change materials' [patent_app_type] => utility [patent_app_number] => 13/867525 [patent_app_country] => US [patent_app_date] => 2013-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 8115 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13867525 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/867525
Composite target sputtering for forming doped phase change materials Apr 21, 2013 Issued
Array ( [id] => 9118206 [patent_doc_number] => 20130285128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/858844 [patent_app_country] => US [patent_app_date] => 2013-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6392 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13858844 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/858844
Semiconductor device and method for fabricating the same Apr 7, 2013 Issued
Array ( [id] => 8973675 [patent_doc_number] => 20130207105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'Controlled Localized Defect Paths for Resistive Memories' [patent_app_type] => utility [patent_app_number] => 13/834741 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11525 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13834741 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/834741
Controlled localized defect paths for resistive memories Mar 14, 2013 Issued
Array ( [id] => 9065050 [patent_doc_number] => 20130256806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING CONTACT HOLES AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/833972 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5009 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13833972 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/833972
Semiconductor device including contact holes and method for forming the same Mar 14, 2013 Issued
Array ( [id] => 8891755 [patent_doc_number] => 20130164939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'METHOD, APPARATUS FOR HOLDING AND TREATMENT OF A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/774827 [patent_app_country] => US [patent_app_date] => 2013-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9504 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13774827 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/774827
Method, apparatus for holding and treatment of a substrate Feb 21, 2013 Issued
Array ( [id] => 8888522 [patent_doc_number] => 20130161706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'JUNCTION FIELD EFFECT TRANSISTOR WITH AN EPITAXIALLY GROWN GATE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/772881 [patent_app_country] => US [patent_app_date] => 2013-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16970 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13772881 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/772881
Junction field effect transistor with an epitaxially grown gate structure Feb 20, 2013 Issued
Array ( [id] => 9074258 [patent_doc_number] => 08551835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Electrostatic discharge protection device and method' [patent_app_type] => utility [patent_app_number] => 13/769650 [patent_app_country] => US [patent_app_date] => 2013-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 2596 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13769650 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/769650
Electrostatic discharge protection device and method Feb 17, 2013 Issued
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