Search

Raymond Ngan Phan

Examiner (ID: 5752, Phone: (571)272-3630 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2111, 2175, 2186, 2185, 2305, 2781, 2181, 2787
Total Applications
1868
Issued Applications
1698
Pending Applications
98
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9408545 [patent_doc_number] => 20140099797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-10 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/123576 [patent_app_country] => US [patent_app_date] => 2012-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 21906 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14123576 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/123576
Method of manufacturing semiconductor device, substrate processing method and substrate processing apparatus May 16, 2012 Issued
Array ( [id] => 8368164 [patent_doc_number] => 20120217551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'JUNCTION FIELD EFFECT TRANSISTOR WITH REGION OF REDUCED DOPING' [patent_app_type] => utility [patent_app_number] => 13/468809 [patent_app_country] => US [patent_app_date] => 2012-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4035 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13468809 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/468809
Junction field effect transistor with region of reduced doping May 9, 2012 Issued
Array ( [id] => 8359124 [patent_doc_number] => 20120214284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'METHOD FOR FABRICATING METAL GATE TRANSISTOR AND POLYSILICON RESISTOR' [patent_app_type] => utility [patent_app_number] => 13/461791 [patent_app_country] => US [patent_app_date] => 2012-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3074 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13461791 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/461791
Method for fabricating metal gate transistor and polysilicon resistor May 1, 2012 Issued
Array ( [id] => 9477313 [patent_doc_number] => 20140134776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'DYE ADSORPTION DEVICE AND DYE ADSORPTION METHOD' [patent_app_type] => utility [patent_app_number] => 14/129145 [patent_app_country] => US [patent_app_date] => 2012-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7454 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14129145 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/129145
DYE ADSORPTION DEVICE AND DYE ADSORPTION METHOD Apr 23, 2012 Abandoned
Array ( [id] => 8301551 [patent_doc_number] => 20120184108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'METHOD OF PROCESSING OF NITRIDE SEMICONDUCTOR WAFER, NITRIDE SEMICONDUCTOR WAFER, METHOD OF PRODUCING NITRIDE SEMICONDUCTOR DEVICE AND NITRIDE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/437221 [patent_app_country] => US [patent_app_date] => 2012-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 24686 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13437221 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/437221
METHOD OF PROCESSING OF NITRIDE SEMICONDUCTOR WAFER, NITRIDE SEMICONDUCTOR WAFER, METHOD OF PRODUCING NITRIDE SEMICONDUCTOR DEVICE AND NITRIDE SEMICONDUCTOR DEVICE Apr 1, 2012 Abandoned
Array ( [id] => 8871085 [patent_doc_number] => 08466464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Test and enable circuitry connected between embedded die circuits' [patent_app_type] => utility [patent_app_number] => 13/432667 [patent_app_country] => US [patent_app_date] => 2012-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 5718 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13432667 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/432667
Test and enable circuitry connected between embedded die circuits Mar 27, 2012 Issued
Array ( [id] => 9662116 [patent_doc_number] => 08809090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'All-silicon Raman amplifiers and laser based on micro ring resonators' [patent_app_type] => utility [patent_app_number] => 13/419173 [patent_app_country] => US [patent_app_date] => 2012-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3193 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13419173 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/419173
All-silicon Raman amplifiers and laser based on micro ring resonators Mar 12, 2012 Issued
Array ( [id] => 9250361 [patent_doc_number] => 08614139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-24 [patent_title] => 'Dicing film with protecting film' [patent_app_type] => utility [patent_app_number] => 13/415524 [patent_app_country] => US [patent_app_date] => 2012-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 11535 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13415524 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/415524
Dicing film with protecting film Mar 7, 2012 Issued
Array ( [id] => 8265398 [patent_doc_number] => 20120164825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'SEMICONDUCTOR PACKAGE WITH A METAL POST AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/409737 [patent_app_country] => US [patent_app_date] => 2012-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 67 [patent_figures_cnt] => 67 [patent_no_of_words] => 7868 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13409737 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/409737
Semiconductor package with a metal post and manufacturing method thereof Feb 29, 2012 Issued
Array ( [id] => 8379808 [patent_doc_number] => 20120223441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'STACKED SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/403333 [patent_app_country] => US [patent_app_date] => 2012-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8917 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13403333 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/403333
Stacked semiconductor device and manufacturing method thereof Feb 22, 2012 Issued
Array ( [id] => 8987100 [patent_doc_number] => 20130214381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 13/400407 [patent_app_country] => US [patent_app_date] => 2012-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2797 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13400407 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/400407
Methods of forming isolation structures for semiconductor devices Feb 19, 2012 Issued
Array ( [id] => 8340012 [patent_doc_number] => 08241934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Display substrate and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/397631 [patent_app_country] => US [patent_app_date] => 2012-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 3247 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13397631 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/397631
Display substrate and method of manufacturing the same Feb 14, 2012 Issued
Array ( [id] => 8483304 [patent_doc_number] => 20120282711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'MAGNETIC TUNNEL JUNCTION (MTJ) FORMATION USING MULTIPLE ETCHING PROCESSES' [patent_app_type] => utility [patent_app_number] => 13/371380 [patent_app_country] => US [patent_app_date] => 2012-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5120 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13371380 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/371380
Magnetic tunnel junction (MTJ) formation using multiple etching processes Feb 9, 2012 Issued
Array ( [id] => 8210256 [patent_doc_number] => 20120129328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'MULTIPLE LAYER BARRIER METAL FOR DEVICE COMPONENT FORMED IN CONTACT TRENCH' [patent_app_type] => utility [patent_app_number] => 13/361486 [patent_app_country] => US [patent_app_date] => 2012-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3103 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20120129328.pdf [firstpage_image] =>[orig_patent_app_number] => 13361486 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/361486
Multiple layer barrier metal for device component formed in contact trench Jan 29, 2012 Issued
Array ( [id] => 8192760 [patent_doc_number] => 20120119223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'Gallium Nitride Semiconductor Structures with Compositionally-Graded Transition Layer' [patent_app_type] => utility [patent_app_number] => 13/359892 [patent_app_country] => US [patent_app_date] => 2012-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7090 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119223.pdf [firstpage_image] =>[orig_patent_app_number] => 13359892 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/359892
Gallium nitride semiconductor structures with compositionally-graded transition layer Jan 26, 2012 Issued
Array ( [id] => 9503352 [patent_doc_number] => 08741665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Method of manufacturing semiconductor module' [patent_app_type] => utility [patent_app_number] => 13/350966 [patent_app_country] => US [patent_app_date] => 2012-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3517 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13350966 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/350966
Method of manufacturing semiconductor module Jan 15, 2012 Issued
Array ( [id] => 9350279 [patent_doc_number] => 08669170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-11 [patent_title] => 'Methods of reducing gate leakage' [patent_app_type] => utility [patent_app_number] => 13/350891 [patent_app_country] => US [patent_app_date] => 2012-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3791 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13350891 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/350891
Methods of reducing gate leakage Jan 15, 2012 Issued
Array ( [id] => 8925426 [patent_doc_number] => 20130181186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-18 [patent_title] => 'INTEGRATION OF CURRENT BLOCKING LAYER AND n-GaN CONTACT DOPING BY IMPLANTATION' [patent_app_type] => utility [patent_app_number] => 13/351039 [patent_app_country] => US [patent_app_date] => 2012-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2286 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13351039 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/351039
Integration of current blocking layer and n-GaN contact doping by implantation Jan 15, 2012 Issued
Array ( [id] => 9009292 [patent_doc_number] => 08524589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Plasma treatment of silicon nitride and silicon oxynitride' [patent_app_type] => utility [patent_app_number] => 13/351033 [patent_app_country] => US [patent_app_date] => 2012-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2234 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13351033 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/351033
Plasma treatment of silicon nitride and silicon oxynitride Jan 15, 2012 Issued
Array ( [id] => 8313130 [patent_doc_number] => 20120190153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'METHOD FOR CONNECTING SUBSTRATE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/350129 [patent_app_country] => US [patent_app_date] => 2012-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7337 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13350129 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/350129
Method for connecting substrate and method for manufacturing semiconductor device Jan 12, 2012 Issued
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