Raymond Ngan Phan

Array ( [id] => 19167158 [patent_doc_number] => 11983061 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-05-14 [patent_title] => Information handling system peripheral device sleep power management [patent_app_type] => utility [patent_app_number] => 17/975969 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 69 [patent_figures_cnt] => 71 [patent_no_of_words] => 15156 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17975969 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18346105 [patent_doc_number] => 20230134215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => System and Method for Flexibly Crossing Packets of Different Protocols [patent_app_type] => utility [patent_app_number] => 17/973894 [patent_app_country] => US [patent_app_date] => 2022-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17973894 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18981972 [patent_doc_number] => 11907145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Integrated circuit device with multiple direct memory access (DMA) data paths [patent_app_type] => utility [patent_app_number] => 17/971707 [patent_app_country] => US [patent_app_date] => 2022-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17971707 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18320822 [patent_doc_number] => 20230118950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => COMPUTER PROCESSING UNIT INTRA-FRAME CLOCK AND VOLTAGE SCALING BASED ON GRAPHICS APPLICATION AWARENESS [patent_app_type] => utility [patent_app_number] => 17/963129 [patent_app_country] => US [patent_app_date] => 2022-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12278 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17963129 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19087665 [patent_doc_number] => 20240114466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => SYSTEM AND METHOD FOR DYNAMIC POWER SCALING IN A SERVER SYSTEM [patent_app_type] => utility [patent_app_number] => 17/957376 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17957376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19087665 [patent_doc_number] => 20240114466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => SYSTEM AND METHOD FOR DYNAMIC POWER SCALING IN A SERVER SYSTEM [patent_app_type] => utility [patent_app_number] => 17/957376 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17957376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19933484 [patent_doc_number] => 12306688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Device state determination based on power signatures [patent_app_type] => utility [patent_app_number] => 17/934312 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 13663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934312 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19293070 [patent_doc_number] => 12032422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Power supplying apparatus that supplies power to external apparatus based on power flow information and the role of the power supplying apparatus and a method of controlling the same [patent_app_type] => utility [patent_app_number] => 17/946104 [patent_app_country] => US [patent_app_date] => 2022-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5015 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17946104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19566247 [patent_doc_number] => 12141017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Systems and methods for coordinating power delivery in a modular multi-phase power delivery system [patent_app_type] => utility [patent_app_number] => 17/899745 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 10494 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899745 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19005518 [patent_doc_number] => 20240069589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => MEMORY DEVICE CLOCK MAPPING [patent_app_type] => utility [patent_app_number] => 17/897957 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9553 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17897957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18251105 [patent_doc_number] => 20230078144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => METHOD, SYSTEM, AND DEVICE FOR SOFTWARE AND HARDWARE COMPONENT CONFIGURATION AND CONTENT GENERATION [patent_app_type] => utility [patent_app_number] => 17/898306 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17898306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18614419 [patent_doc_number] => 20230281156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => PARTITIONING DATAFLOW OPERATIONS FOR A RECONFIGURABLE COMPUTING SYSTEM [patent_app_type] => utility [patent_app_number] => 17/894127 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -34 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17894127 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18212017 [patent_doc_number] => 20230058281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => Control System and Method for Fine-Grained Reconciliation of Local Archives in Master/Master Scenarios of Servers of a Technical Installation [patent_app_type] => utility [patent_app_number] => 17/892223 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892223 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18221914 [patent_doc_number] => 20230060908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => COMPUTER SYSTEM AND METHOD FOR BOOTING UP THE COMPUTER SYSTEM [patent_app_type] => utility [patent_app_number] => 17/890865 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890865 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19078017 [patent_doc_number] => 11947380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Separate clocking for components of a graphics processing unit [patent_app_type] => utility [patent_app_number] => 17/890520 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6485 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890520 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19551898 [patent_doc_number] => 12135603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Monitoring energy consumption associated with users of a distributed computing system using tracing [patent_app_type] => utility [patent_app_number] => 17/889497 [patent_app_country] => US [patent_app_date] => 2022-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18079607 [patent_doc_number] => 20220405219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => COMMUNICATION INTERFACE BETWEEN HOST SYSTEM AND STATE MACHINE [patent_app_type] => utility [patent_app_number] => 17/886396 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886396 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19941983 [patent_doc_number] => 12314112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Power optimization for a multistage stack of thermoelectric cooling devices [patent_app_type] => utility [patent_app_number] => 17/868839 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3001 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868839 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19678084 [patent_doc_number] => 12189945 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Z-axis compression connector coupling for memory modules [patent_app_type] => utility [patent_app_number] => 17/858396 [patent_app_country] => US [patent_app_date] => 2022-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 9034 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17858396 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17947976 [patent_doc_number] => 20220334995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => PARAMETER EXCHANGE FOR A DIE-TO-DIE INTERCONNECT [patent_app_type] => utility [patent_app_number] => 17/855687 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855687 [rel_patent_id] =>[rel_patent_doc_number] =>)