Search

Raymond Ngan Phan

Examiner (ID: 6794)

Most Active Art Unit
2111
Art Unit(s)
2186, 2305, 2787, 2185, 2781, 2181, 2175, 2111
Total Applications
1838
Issued Applications
1676
Pending Applications
92
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18104324 [patent_doc_number] => 11544210 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-01-03 [patent_title] => Collection of runtime information for debug and analysis [patent_app_type] => utility [patent_app_number] => 17/854435 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8328 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854435 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854435
Collection of runtime information for debug and analysis Jun 29, 2022 Issued
Array ( [id] => 18881453 [patent_doc_number] => 20240004822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => AUTOMATIC PROVISION OF HIGH SPEED SERIALIZER/DESERIALIZER LANES BY FIRMWARE [patent_app_type] => utility [patent_app_number] => 17/854490 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854490 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854490
AUTOMATIC PROVISION OF HIGH SPEED SERIALIZER/DESERIALIZER LANES BY FIRMWARE Jun 29, 2022 Pending
Array ( [id] => 17947971 [patent_doc_number] => 20220334990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => ZONE DRIVE DATA FORMAT [patent_app_type] => utility [patent_app_number] => 17/853822 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853822 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/853822
Data storage in a zone drive Jun 28, 2022 Issued
Array ( [id] => 17931624 [patent_doc_number] => 20220326749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => TECHNIQUES FOR REDUCING FIRMWARE ACTIVATION TIME [patent_app_type] => utility [patent_app_number] => 17/853459 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6517 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853459 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/853459
Systems and methods capable of bypassing non-volatile memory when storing firmware in execution memory Jun 28, 2022 Issued
Array ( [id] => 17931968 [patent_doc_number] => 20220327093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => Circuit Architecture Mapping Signals to Functions for State Machine Execution [patent_app_type] => utility [patent_app_number] => 17/852264 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852264 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852264
Executing functions in response to reading event indices on an event queue by a state machine Jun 27, 2022 Issued
Array ( [id] => 17984577 [patent_doc_number] => 20220350614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => Preloading of applications transparently to user [patent_app_type] => utility [patent_app_number] => 17/849644 [patent_app_country] => US [patent_app_date] => 2022-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849644 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849644
Preloading of applications transparently to user using audio-focus component, and detection of preloading completion Jun 25, 2022 Issued
Array ( [id] => 17947831 [patent_doc_number] => 20220334850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => Techniques for preloading of applications transparently to user [patent_app_type] => utility [patent_app_number] => 17/849646 [patent_app_country] => US [patent_app_date] => 2022-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849646 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849646
Techniques for detecting completion of preloading of user applications Jun 25, 2022 Issued
Array ( [id] => 18592130 [patent_doc_number] => 11741028 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-08-29 [patent_title] => Efficiently striping ordered PCIe writes across multiple socket-to-socket links [patent_app_type] => utility [patent_app_number] => 17/664317 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11578 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17664317 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/664317
Efficiently striping ordered PCIe writes across multiple socket-to-socket links May 19, 2022 Issued
Array ( [id] => 18998934 [patent_doc_number] => 11915788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Indication in memory system or sub-system of latency associated with performing an access command [patent_app_type] => utility [patent_app_number] => 17/727283 [patent_app_country] => US [patent_app_date] => 2022-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 18167 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17727283 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/727283
Indication in memory system or sub-system of latency associated with performing an access command Apr 21, 2022 Issued
Array ( [id] => 18728180 [patent_doc_number] => 20230342473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => (BIOS) ENFORCED APPLICATION BLOCKLIST SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 17/660070 [patent_app_country] => US [patent_app_date] => 2022-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17660070 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/660070
(BIOS) enforced application blocklist system and method Apr 20, 2022 Issued
Array ( [id] => 17931951 [patent_doc_number] => 20220327076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => IO-Link System with Diagnostic Channel [patent_app_type] => utility [patent_app_number] => 17/712832 [patent_app_country] => US [patent_app_date] => 2022-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4316 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17712832 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/712832
IO-link system with diagnostic channel Apr 3, 2022 Issued
Array ( [id] => 18637818 [patent_doc_number] => 11762415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Time calibration across multi-socket computing systems [patent_app_type] => utility [patent_app_number] => 17/710181 [patent_app_country] => US [patent_app_date] => 2022-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8448 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17710181 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/710181
Time calibration across multi-socket computing systems Mar 30, 2022 Issued
Array ( [id] => 18679471 [patent_doc_number] => 20230317127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => DUAL CHIP CLOCK SYNCHRONIZATION [patent_app_type] => utility [patent_app_number] => 17/657520 [patent_app_country] => US [patent_app_date] => 2022-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17657520 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/657520
Dual chip clock synchronization Mar 30, 2022 Issued
Array ( [id] => 19174475 [patent_doc_number] => 20240160449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => CONFIGURABLE INTERCONNECT ADDRESS REMAPPER WITH EVENT RECOGNITION [patent_app_type] => utility [patent_app_number] => 18/282728 [patent_app_country] => US [patent_app_date] => 2022-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18282728 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/282728
Technologies for interconnect address remapper with event recognition and register management Mar 27, 2022 Issued
Array ( [id] => 19174475 [patent_doc_number] => 20240160449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => CONFIGURABLE INTERCONNECT ADDRESS REMAPPER WITH EVENT RECOGNITION [patent_app_type] => utility [patent_app_number] => 18/282728 [patent_app_country] => US [patent_app_date] => 2022-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18282728 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/282728
Technologies for interconnect address remapper with event recognition and register management Mar 27, 2022 Issued
Array ( [id] => 17722267 [patent_doc_number] => 20220214989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => Emulated Telemetry Interfaces For Computing Units [patent_app_type] => utility [patent_app_number] => 17/702057 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/702057
Emulated telemetry interfaces for computing units Mar 22, 2022 Issued
Array ( [id] => 19398406 [patent_doc_number] => 12072767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Error information storage for boot-up procedures [patent_app_type] => utility [patent_app_number] => 17/758333 [patent_app_country] => US [patent_app_date] => 2022-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11786 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17758333 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/758333
Error information storage for boot-up procedures Mar 16, 2022 Issued
Array ( [id] => 19493069 [patent_doc_number] => 12111780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Multi-channel system architecture for managing flow of data and associated trace information [patent_app_type] => utility [patent_app_number] => 17/677638 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677638
Multi-channel system architecture for managing flow of data and associated trace information Feb 21, 2022 Issued
Array ( [id] => 17832323 [patent_doc_number] => 20220269627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => INTERRUPT MANAGEMENT SYSTEM AND METHOD IN A DIGITAL COMMUNICATION INTERFACE [patent_app_type] => utility [patent_app_number] => 17/673677 [patent_app_country] => US [patent_app_date] => 2022-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4897 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17673677 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/673677
Digital interrupt management system with bidirectional selection lines Feb 15, 2022 Issued
Array ( [id] => 19036128 [patent_doc_number] => 20240085943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => CONTROLLING A NETWORK OF DATA PROCESSING DEVICES FOR A QUANTUM COMPUTER [patent_app_type] => utility [patent_app_number] => 18/263586 [patent_app_country] => US [patent_app_date] => 2022-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18263586 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/263586
CONTROLLING A NETWORK OF DATA PROCESSING DEVICES FOR A QUANTUM COMPUTER Feb 2, 2022 Pending
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