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Reema Patel

Examiner (ID: 4332, Phone: (571)270-1436 , Office: P/2812 )

Most Active Art Unit
2812
Art Unit(s)
2812
Total Applications
1405
Issued Applications
1166
Pending Applications
125
Abandoned Applications
157

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20013135 [patent_doc_number] => 20250151357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => SEMICONDUCTOR FABRICATION PROCESSES FOR DEFECT REDUCTION [patent_app_type] => utility [patent_app_number] => 18/504398 [patent_app_country] => US [patent_app_date] => 2023-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504398 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/504398
SEMICONDUCTOR FABRICATION PROCESSES FOR DEFECT REDUCTION Nov 7, 2023 Pending
Array ( [id] => 19844130 [patent_doc_number] => 12256546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Integrated assemblies and methods of forming integrated assemblies [patent_app_type] => utility [patent_app_number] => 18/386346 [patent_app_country] => US [patent_app_date] => 2023-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 32 [patent_no_of_words] => 7445 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18386346 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/386346
Integrated assemblies and methods of forming integrated assemblies Nov 1, 2023 Issued
Array ( [id] => 19539352 [patent_doc_number] => 12131908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Semiconductor structure with air gap in pattern-dense region and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/383158 [patent_app_country] => US [patent_app_date] => 2023-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 11353 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18383158 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/383158
Semiconductor structure with air gap in pattern-dense region and method of manufacturing the same Oct 23, 2023 Issued
Array ( [id] => 19146602 [patent_doc_number] => 20240145632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => MICRO LIGHT EMITTING DEVICE AND MICRO LIGHT EMITTING APPARATUS USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/492427 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6488 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18492427 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/492427
MICRO LIGHT EMITTING DEVICE AND MICRO LIGHT EMITTING APPARATUS USING THE SAME Oct 22, 2023 Pending
Array ( [id] => 18959232 [patent_doc_number] => 20240047559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING BOTTOM-UP OXIDATION APPROACH [patent_app_type] => utility [patent_app_number] => 18/381887 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381887 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/381887
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING BOTTOM-UP OXIDATION APPROACH Oct 18, 2023 Pending
Array ( [id] => 19988590 [patent_doc_number] => 20250126812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => INTEGRATED CIRCUIT FABRICATION EMPLOYING SELF-ALIGNED MASK [patent_app_type] => utility [patent_app_number] => 18/488071 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488071 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/488071
INTEGRATED CIRCUIT FABRICATION EMPLOYING SELF-ALIGNED MASK Oct 16, 2023 Pending
Array ( [id] => 18943537 [patent_doc_number] => 20240038676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => ARRAY SUBSTRATE, PREPARATION METHOD THEREOF, DISPLAY PANEL, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/380305 [patent_app_country] => US [patent_app_date] => 2023-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8536 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380305 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/380305
ARRAY SUBSTRATE, PREPARATION METHOD THEREOF, DISPLAY PANEL, AND DISPLAY DEVICE Oct 15, 2023 Pending
Array ( [id] => 19308909 [patent_doc_number] => 20240237492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => WINDOW AND DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/481221 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18481221 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/481221
WINDOW AND DISPLAY DEVICE INCLUDING THE SAME Oct 3, 2023 Pending
Array ( [id] => 18927023 [patent_doc_number] => 20240030027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => FORMATION OF SINGLE CRYSTAL SEMICONDUCTORS USING PLANAR VAPOR LIQUID SOLID EPITAXY [patent_app_type] => utility [patent_app_number] => 18/480378 [patent_app_country] => US [patent_app_date] => 2023-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480378 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/480378
Formation of single crystal semiconductors using planar vapor liquid solid epitaxy Oct 2, 2023 Issued
Array ( [id] => 19308854 [patent_doc_number] => 20240237437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/372990 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18372990 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/372990
DISPLAY APPARATUS Sep 25, 2023 Pending
Array ( [id] => 19101051 [patent_doc_number] => 20240120279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/471730 [patent_app_country] => US [patent_app_date] => 2023-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9925 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471730 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/471730
SEMICONDUCTOR DEVICE Sep 20, 2023 Issued
Array ( [id] => 19054656 [patent_doc_number] => 20240096625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => HARDMASK STRUCTURE AND METHOD OF FORMING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/369321 [patent_app_country] => US [patent_app_date] => 2023-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18369321 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/369321
HARDMASK STRUCTURE AND METHOD OF FORMING SEMICONDUCTOR STRUCTURE Sep 17, 2023 Pending
Array ( [id] => 19850788 [patent_doc_number] => 20250096139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => AIRGAPS IN TOP LAYERS OF SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/468366 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18468366 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/468366
AIRGAPS IN TOP LAYERS OF SEMICONDUCTOR DEVICES Sep 14, 2023 Pending
Array ( [id] => 18866017 [patent_doc_number] => 20230420454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/465997 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18465997 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/465997
SEMICONDUCTOR DEVICE Sep 12, 2023 Pending
Array ( [id] => 19392838 [patent_doc_number] => 20240282708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/464539 [patent_app_country] => US [patent_app_date] => 2023-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18464539 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/464539
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Sep 10, 2023 Pending
Array ( [id] => 19823385 [patent_doc_number] => 20250081592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => CONTACT RESISTANCE REDUCTION FOR DIRECT BACKSIDE CONTACT [patent_app_type] => utility [patent_app_number] => 18/242943 [patent_app_country] => US [patent_app_date] => 2023-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3693 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18242943 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/242943
CONTACT RESISTANCE REDUCTION FOR DIRECT BACKSIDE CONTACT Sep 5, 2023 Pending
Array ( [id] => 19823397 [patent_doc_number] => 20250081604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => THREE DIMENSIONAL INTEGRATED CIRCUIT AND FABRICATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/461700 [patent_app_country] => US [patent_app_date] => 2023-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18461700 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/461700
THREE DIMENSIONAL INTEGRATED CIRCUIT AND FABRICATION THEREOF Sep 5, 2023 Pending
Array ( [id] => 19531798 [patent_doc_number] => 20240355700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => DIE-PACKAGE INTERCONNECT TO FACILITATE THERMAL CONDUCTION [patent_app_type] => utility [patent_app_number] => 18/458367 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458367 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/458367
DIE-PACKAGE INTERCONNECT TO FACILITATE THERMAL CONDUCTION Aug 29, 2023 Pending
Array ( [id] => 19812521 [patent_doc_number] => 12243934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Channel structures including doped 2D materials for semiconductor devices [patent_app_type] => utility [patent_app_number] => 18/452581 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 77 [patent_no_of_words] => 15205 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18452581 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/452581
Channel structures including doped 2D materials for semiconductor devices Aug 20, 2023 Issued
Array ( [id] => 18821263 [patent_doc_number] => 20230395604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 18/234678 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234678 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234678
Semiconductor integrated circuit device Aug 15, 2023 Issued
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