Search

Reema Patel

Examiner (ID: 6667, Phone: (571)270-1436 , Office: P/2812 )

Most Active Art Unit
2812
Art Unit(s)
2812
Total Applications
1385
Issued Applications
1154
Pending Applications
133
Abandoned Applications
157

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16553126 [patent_doc_number] => 10886291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Joint opening structures of three-dimensional memory devices and methods for forming the same [patent_app_type] => utility [patent_app_number] => 16/046847 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 120 [patent_figures_cnt] => 133 [patent_no_of_words] => 27050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16046847 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/046847
Joint opening structures of three-dimensional memory devices and methods for forming the same Jul 25, 2018 Issued
Array ( [id] => 13963259 [patent_doc_number] => 20190057974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => HYBRID BONDING CONTACT STRUCTURE OF THREE-DIMENSIONAL MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/046852 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16046852 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/046852
Hybrid bonding contact structure of three-dimensional memory device Jul 25, 2018 Issued
Array ( [id] => 14446855 [patent_doc_number] => 20190181301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => LIGHT-EMITTING DEVICE AND DISPLAY DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/046037 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10541 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16046037 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/046037
LED element with an inverted taper structure for minimizing a defect rate of electrode connections, and display device using the same Jul 25, 2018 Issued
Array ( [id] => 16068175 [patent_doc_number] => 10693054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => MTJ bottom metal via in a memory cell and method for producing the same [patent_app_type] => utility [patent_app_number] => 16/046648 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3522 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16046648 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/046648
MTJ bottom metal via in a memory cell and method for producing the same Jul 25, 2018 Issued
Array ( [id] => 16553126 [patent_doc_number] => 10886291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Joint opening structures of three-dimensional memory devices and methods for forming the same [patent_app_type] => utility [patent_app_number] => 16/046847 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 120 [patent_figures_cnt] => 133 [patent_no_of_words] => 27050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16046847 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/046847
Joint opening structures of three-dimensional memory devices and methods for forming the same Jul 25, 2018 Issued
Array ( [id] => 14050127 [patent_doc_number] => 20190081171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/046642 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8095 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16046642 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/046642
Semiconductor device and method for manufacturing the same Jul 25, 2018 Issued
Array ( [id] => 16553126 [patent_doc_number] => 10886291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Joint opening structures of three-dimensional memory devices and methods for forming the same [patent_app_type] => utility [patent_app_number] => 16/046847 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 120 [patent_figures_cnt] => 133 [patent_no_of_words] => 27050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16046847 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/046847
Joint opening structures of three-dimensional memory devices and methods for forming the same Jul 25, 2018 Issued
Array ( [id] => 16432966 [patent_doc_number] => 10833063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-10 [patent_title] => High electron mobility transistor ESD protection structures [patent_app_type] => utility [patent_app_number] => 16/044835 [patent_app_country] => US [patent_app_date] => 2018-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5098 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16044835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/044835
High electron mobility transistor ESD protection structures Jul 24, 2018 Issued
Array ( [id] => 17683532 [patent_doc_number] => 11367797 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Nanopore FET sensor with non-linear potential profile [patent_app_type] => utility [patent_app_number] => 16/761712 [patent_app_country] => US [patent_app_date] => 2018-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 10700 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16761712 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/761712
Nanopore FET sensor with non-linear potential profile Jul 23, 2018 Issued
Array ( [id] => 19928448 [patent_doc_number] => 12302762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Material, system and method making use of plasmon resonance [patent_app_type] => utility [patent_app_number] => 16/632476 [patent_app_country] => US [patent_app_date] => 2018-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 75 [patent_no_of_words] => 13414 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16632476 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/632476
Material, system and method making use of plasmon resonance Jul 19, 2018 Issued
Array ( [id] => 15250731 [patent_doc_number] => 10510896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/041664 [patent_app_country] => US [patent_app_date] => 2018-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 5174 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16041664 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/041664
Method for manufacturing semiconductor device Jul 19, 2018 Issued
Array ( [id] => 16987976 [patent_doc_number] => 11075159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Integrated fan-out packages and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/035723 [patent_app_country] => US [patent_app_date] => 2018-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16035723 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/035723
Integrated fan-out packages and methods of forming the same Jul 15, 2018 Issued
Array ( [id] => 18277083 [patent_doc_number] => 11616031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Semiconductor device and electronic apparatus [patent_app_type] => utility [patent_app_number] => 16/632665 [patent_app_country] => US [patent_app_date] => 2018-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 69 [patent_figures_cnt] => 69 [patent_no_of_words] => 45033 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16632665 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/632665
Semiconductor device and electronic apparatus Jul 12, 2018 Issued
Array ( [id] => 14657047 [patent_doc_number] => 20190235652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => MANUFACTURING METHOD FOR DISPLAY PANEL, SYSTEM FOR MANUFACTURING DISPLAY PANEL AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/033213 [patent_app_country] => US [patent_app_date] => 2018-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16033213 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/033213
Manufacturing method for display panel, system for manufacturing display panel and display panel Jul 11, 2018 Issued
Array ( [id] => 13996525 [patent_doc_number] => 20190067420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/027825 [patent_app_country] => US [patent_app_date] => 2018-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16027825 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/027825
Semiconductor device Jul 4, 2018 Issued
Array ( [id] => 15823121 [patent_doc_number] => 10636756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Semiconductor device and method of forming protrusion E-bar for 3D SIP [patent_app_type] => utility [patent_app_number] => 16/027731 [patent_app_country] => US [patent_app_date] => 2018-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 42 [patent_no_of_words] => 5293 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16027731 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/027731
Semiconductor device and method of forming protrusion E-bar for 3D SIP Jul 4, 2018 Issued
Array ( [id] => 14904335 [patent_doc_number] => 20190295933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/027442 [patent_app_country] => US [patent_app_date] => 2018-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16027442 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/027442
Semiconductor device Jul 4, 2018 Issued
Array ( [id] => 16858371 [patent_doc_number] => 20210159116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => TREATING A SILICON ON INSULATOR WAFER IN PREPARATION FOR MANUFACTURING AN ATOMISTIC ELECTRONIC DEVICE INTERFACED WITH A CMOS ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/632460 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16632460 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/632460
Treating a silicon on insulator wafer in preparation for manufacturing an atomistic electronic device interfaced with a CMOS electronic device Jun 28, 2018 Issued
Array ( [id] => 17730930 [patent_doc_number] => 11387332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/981582 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 3215 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16981582 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/981582
Method for manufacturing semiconductor device Jun 26, 2018 Issued
Array ( [id] => 13499747 [patent_doc_number] => 20180301416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => COPPER ETCHING INTEGRATION SCHEME [patent_app_type] => utility [patent_app_number] => 16/017039 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017039 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/017039
Copper etching integration scheme Jun 24, 2018 Issued
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