Reema Patel

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Array ( [id] => 20011226 [patent_doc_number] => 20250149448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => SEMICONDUCTOR DEVICE WITH BACKSIDE VIAS AND METHOD OF FABRICATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/503666 [patent_app_country] => US [patent_app_date] => 2023-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3348 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18503666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19844130 [patent_doc_number] => 12256546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Integrated assemblies and methods of forming integrated assemblies [patent_app_type] => utility [patent_app_number] => 18/386346 [patent_app_country] => US [patent_app_date] => 2023-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 32 [patent_no_of_words] => 7445 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18386346 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19539352 [patent_doc_number] => 12131908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Semiconductor structure with air gap in pattern-dense region and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/383158 [patent_app_country] => US [patent_app_date] => 2023-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 11353 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18383158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19146602 [patent_doc_number] => 20240145632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => MICRO LIGHT EMITTING DEVICE AND MICRO LIGHT EMITTING APPARATUS USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/492427 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6488 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18492427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18959232 [patent_doc_number] => 20240047559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING BOTTOM-UP OXIDATION APPROACH [patent_app_type] => utility [patent_app_number] => 18/381887 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381887 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19146279 [patent_doc_number] => 20240145308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => WAFER PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 18/490158 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19988590 [patent_doc_number] => 20250126812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => INTEGRATED CIRCUIT FABRICATION EMPLOYING SELF-ALIGNED MASK [patent_app_type] => utility [patent_app_number] => 18/488071 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488071 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18943537 [patent_doc_number] => 20240038676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => ARRAY SUBSTRATE, PREPARATION METHOD THEREOF, DISPLAY PANEL, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/380305 [patent_app_country] => US [patent_app_date] => 2023-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8536 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380305 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19349319 [patent_doc_number] => 20240258283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => DISPLAY DEVICE AND TILED DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/481305 [patent_app_country] => US [patent_app_date] => 2023-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18481305 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19308909 [patent_doc_number] => 20240237492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => WINDOW AND DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/481221 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18481221 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18927023 [patent_doc_number] => 20240030027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => FORMATION OF SINGLE CRYSTAL SEMICONDUCTORS USING PLANAR VAPOR LIQUID SOLID EPITAXY [patent_app_type] => utility [patent_app_number] => 18/480378 [patent_app_country] => US [patent_app_date] => 2023-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480378 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19101084 [patent_doc_number] => 20240120312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => SHIFTED MULTI-VIA CONNECTION FOR HYBRID BONDING [patent_app_type] => utility [patent_app_number] => 18/373098 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18373098 [rel_patent_id] =>[rel_patent_doc_number] =>)

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