Reema Patel

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Array ( [id] => 9600856 [patent_doc_number] => 20140197538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'COPPER ETCHING INTEGRATION SCHEME' [patent_app_type] => utility [patent_app_number] => 14/218060 [patent_app_country] => US [patent_app_date] => 2014-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2862 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14218060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10106747 [patent_doc_number] => 09142530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Coreless integrated circuit packaging system and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 14/214765 [patent_app_country] => US [patent_app_date] => 2014-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 7512 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14214765 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10624413 [patent_doc_number] => 09343363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Through-silicon vias and interposers formed by metal-catalyzed wet etching' [patent_app_type] => utility [patent_app_number] => 14/213046 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10103 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14213046 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 9557662 [patent_doc_number] => 20140175374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'HYBRID CMOS NANOWIRE MESH DEVICE AND FINFET DEVICE' [patent_app_type] => utility [patent_app_number] => 14/194762 [patent_app_country] => US [patent_app_date] => 2014-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14194762 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 9534544 [patent_doc_number] => 20140159190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'Backside Structure and Methods for BSI Image Sensors' [patent_app_type] => utility [patent_app_number] => 14/178084 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5091 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14178084 [rel_patent_id] =>[rel_patent_doc_number] =>)

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