Reema Patel

Array ( [id] => 8884282 [patent_doc_number] => 20130157467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'METHOD FOR FORMING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/327947 [patent_app_country] => US [patent_app_date] => 2011-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2855 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8955761 [patent_doc_number] => 08501533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Method of etching a programmable memory microelectronic device' [patent_app_type] => utility [patent_app_number] => 13/328038 [patent_app_country] => US [patent_app_date] => 2011-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3483 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13328038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8708074 [patent_doc_number] => 20130065363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'METHOD FOR MANUFACTURING A CHIP PACKAGING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/327491 [patent_app_country] => US [patent_app_date] => 2011-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3724 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8884270 [patent_doc_number] => 20130157454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'SELF-ALIGNED WET ETCHING PROCESS' [patent_app_type] => utility [patent_app_number] => 13/327157 [patent_app_country] => US [patent_app_date] => 2011-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 1996 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9831807 [patent_doc_number] => 08940620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-27 [patent_title] => 'Composite wafer for fabrication of semiconductor devices' [patent_app_type] => utility [patent_app_number] => 13/374206 [patent_app_country] => US [patent_app_date] => 2011-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 3539 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13374206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8381908 [patent_doc_number] => 20120225533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/327017 [patent_app_country] => US [patent_app_date] => 2011-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 9287 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327017 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9183795 [patent_doc_number] => 08623727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Method for fabricating semiconductor device with buried gate' [patent_app_type] => utility [patent_app_number] => 13/326810 [patent_app_country] => US [patent_app_date] => 2011-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 5098 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13326810 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8532841 [patent_doc_number] => 08308994 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-11-13 [patent_title] => 'Nano-carbon hybrid structures' [patent_app_type] => utility [patent_app_number] => 13/295595 [patent_app_country] => US [patent_app_date] => 2011-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4869 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13295595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7732652 [patent_doc_number] => 20120015518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'METHOD FOR DEPOSITING THIN TUNGSTEN FILM WITH LOW RESISTIVITY AND ROBUST MICRO-ADHESION CHARACTERISTICS' [patent_app_type] => utility [patent_app_number] => 13/244016 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7972 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20120015518.pdf [firstpage_image] =>[orig_patent_app_number] => 13244016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7716531 [patent_doc_number] => 20120006799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'LASER PROCESSING METHOD AND CHIP' [patent_app_type] => utility [patent_app_number] => 13/235936 [patent_app_country] => US [patent_app_date] => 2011-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 10061 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20120006799.pdf [firstpage_image] =>[orig_patent_app_number] => 13235936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9455028 [patent_doc_number] => 08716034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Method of manufacturing magnetic memory' [patent_app_type] => utility [patent_app_number] => 13/226868 [patent_app_country] => US [patent_app_date] => 2011-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 9494 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226868 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7818030 [patent_doc_number] => 20120064650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'MANUFACTURING METHOD OF THIN FILM TRANSISTOR AND LIQUID CRYSTAL DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/226822 [patent_app_country] => US [patent_app_date] => 2011-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 20853 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20120064650.pdf [firstpage_image] =>[orig_patent_app_number] => 13226822 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8042463 [patent_doc_number] => 20120070966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT' [patent_app_type] => utility [patent_app_number] => 13/226727 [patent_app_country] => US [patent_app_date] => 2011-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 4516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20120070966.pdf [firstpage_image] =>[orig_patent_app_number] => 13226727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9944133 [patent_doc_number] => 08993434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'Methods for forming layers on a substrate' [patent_app_type] => utility [patent_app_number] => 13/226612 [patent_app_country] => US [patent_app_date] => 2011-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5779 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7807625 [patent_doc_number] => 20120058579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-08 [patent_title] => 'METHOD FOR PACKAGING LED CHIP MODULES AND MOVING FIXTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/226067 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4171 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20120058579.pdf [firstpage_image] =>[orig_patent_app_number] => 13226067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8127537 [patent_doc_number] => 20120088317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'PROCESSING METHOD OF SILICON SUBSTRATE AND PROCESS FOR PRODUCING LIQUID EJECTION HEAD' [patent_app_type] => utility [patent_app_number] => 13/226113 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5453 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20120088317.pdf [firstpage_image] =>[orig_patent_app_number] => 13226113 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9401576 [patent_doc_number] => 08691628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-08 [patent_title] => 'Method of manufacturing semiconductor device, manufacturing program, and manufacturing apparatus' [patent_app_type] => utility [patent_app_number] => 13/226152 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 5317 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226152 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7818079 [patent_doc_number] => 20120064699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'METHODS AND SYSTEMS FOR SPRAY PYROLYSIS WITH ADDITION OF VOLATILE NON-POLAR MATERIALS' [patent_app_type] => utility [patent_app_number] => 13/226190 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5528 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20120064699.pdf [firstpage_image] =>[orig_patent_app_number] => 13226190 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9676841 [patent_doc_number] => 08815750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Method for manufacturing a barrier on a sheet and a sheet for PV modules' [patent_app_type] => utility [patent_app_number] => 13/811338 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6717 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13811338 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9676840 [patent_doc_number] => 08815749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Method for manufacturing a barrier layer on a substrate and a multi-layer stack' [patent_app_type] => utility [patent_app_number] => 13/811326 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6643 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13811326 [rel_patent_id] =>[rel_patent_doc_number] =>)