Search

Reginald Alexander

Examiner (ID: 18804, Phone: (571)272-1395 , Office: P/3742 )

Most Active Art Unit
1761
Art Unit(s)
3742, 3405, 1761, 2402, 3761, 2899
Total Applications
4197
Issued Applications
3176
Pending Applications
252
Abandoned Applications
806

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9856429 [patent_doc_number] => 20150036446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-05 [patent_title] => 'DUAL SUPPLY MEMORY' [patent_app_type] => utility [patent_app_number] => 14/158759 [patent_app_country] => US [patent_app_date] => 2014-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9312 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14158759 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/158759
Dual supply memory Jan 16, 2014 Issued
Array ( [id] => 9640889 [patent_doc_number] => 20140219000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'OTP CELL ARRAY INCLUDING PROTECTED AREA, SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME, AND METHOD OF PROGRAMMING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/107199 [patent_app_country] => US [patent_app_date] => 2013-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14107199 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/107199
OTP CELL ARRAY INCLUDING PROTECTED AREA, SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME, AND METHOD OF PROGRAMMING THE SAME Dec 15, 2013 Abandoned
Array ( [id] => 9536184 [patent_doc_number] => 20140160830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'Programmable Resistive Device and Memory Using Diode as Selector' [patent_app_type] => utility [patent_app_number] => 14/101125 [patent_app_country] => US [patent_app_date] => 2013-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14886 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14101125 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/101125
Programmable resistive device and memory using diode as selector Dec 8, 2013 Issued
Array ( [id] => 11300396 [patent_doc_number] => 09508405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-29 [patent_title] => 'Method and circuit to enable wide supply voltage difference in multi-supply memory' [patent_app_type] => utility [patent_app_number] => 14/045589 [patent_app_country] => US [patent_app_date] => 2013-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 7724 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14045589 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/045589
Method and circuit to enable wide supply voltage difference in multi-supply memory Oct 2, 2013 Issued
Array ( [id] => 9434159 [patent_doc_number] => 20140112065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-24 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/043355 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8575 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043355 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/043355
SEMICONDUCTOR MEMORY DEVICE Sep 30, 2013 Abandoned
Array ( [id] => 10200571 [patent_doc_number] => 20150085557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-26 [patent_title] => 'MEMORY HAVING ONE TIME PROGRAMMABLE (OTP) ELEMENTS AND A METHOD OF PROGRAMMING THE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/038401 [patent_app_country] => US [patent_app_date] => 2013-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14038401 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/038401
Memory having one time programmable (OTP) elements and a method of programming the memory Sep 25, 2013 Issued
Array ( [id] => 10384988 [patent_doc_number] => 20150269995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/430449 [patent_app_country] => US [patent_app_date] => 2013-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 16799 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14430449 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/430449
SEMICONDUCTOR DEVICE Sep 19, 2013 Abandoned
Array ( [id] => 9755392 [patent_doc_number] => 20140286093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-25 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/022729 [patent_app_country] => US [patent_app_date] => 2013-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8737 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14022729 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/022729
SEMICONDUCTOR MEMORY DEVICE Sep 9, 2013 Abandoned
Array ( [id] => 11659915 [patent_doc_number] => 09672926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'Apparatus and method of programming and verification for a nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/014125 [patent_app_country] => US [patent_app_date] => 2013-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 32 [patent_no_of_words] => 10756 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14014125 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/014125
Apparatus and method of programming and verification for a nonvolatile semiconductor memory device Aug 28, 2013 Issued
Array ( [id] => 9837696 [patent_doc_number] => 20150029778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-29 [patent_title] => 'MASK-PROGRAMMED READ ONLY MEMORY WITH ENHANCED SECURITY' [patent_app_type] => utility [patent_app_number] => 13/953511 [patent_app_country] => US [patent_app_date] => 2013-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4775 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13953511 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/953511
Mask-programmed read only memory with enhanced security Jul 28, 2013 Issued
Array ( [id] => 11645248 [patent_doc_number] => 09666642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Variable resistance memory device and method of driving the same' [patent_app_type] => utility [patent_app_number] => 13/950681 [patent_app_country] => US [patent_app_date] => 2013-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 2692 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13950681 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/950681
Variable resistance memory device and method of driving the same Jul 24, 2013 Issued
Array ( [id] => 10158377 [patent_doc_number] => 09190160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Memory device having variable read voltage and related methods of operation' [patent_app_type] => utility [patent_app_number] => 13/948431 [patent_app_country] => US [patent_app_date] => 2013-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 34 [patent_no_of_words] => 15805 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13948431 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/948431
Memory device having variable read voltage and related methods of operation Jul 22, 2013 Issued
Array ( [id] => 9146819 [patent_doc_number] => 20130301342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'MEMORY ELEMENT, STACKING, MEMORY MATRIX AND METHOD FOR OPERATION' [patent_app_type] => utility [patent_app_number] => 13/943141 [patent_app_country] => US [patent_app_date] => 2013-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 17538 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13943141 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/943141
MEMORY ELEMENT, STACKING, MEMORY MATRIX AND METHOD FOR OPERATION Jul 15, 2013 Abandoned
Array ( [id] => 10973281 [patent_doc_number] => 20140376316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'PROGRAMMABLE MEMORY CELL AND DATA READ METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/924615 [patent_app_country] => US [patent_app_date] => 2013-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1994 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924615 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/924615
PROGRAMMABLE MEMORY CELL AND DATA READ METHOD THEREOF Jun 22, 2013 Abandoned
Array ( [id] => 10106535 [patent_doc_number] => 09142318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Method for controlling the breakdown of an antifuse memory cell' [patent_app_type] => utility [patent_app_number] => 13/887167 [patent_app_country] => US [patent_app_date] => 2013-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2360 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13887167 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/887167
Method for controlling the breakdown of an antifuse memory cell May 2, 2013 Issued
Array ( [id] => 11359955 [patent_doc_number] => 09536611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-03 [patent_title] => '3D NAND memory using two separate SSL structures in an interlaced configuration for one bit line' [patent_app_type] => utility [patent_app_number] => 13/887019 [patent_app_country] => US [patent_app_date] => 2013-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8414 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13887019 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/887019
3D NAND memory using two separate SSL structures in an interlaced configuration for one bit line May 2, 2013 Issued
Array ( [id] => 9733285 [patent_doc_number] => 20140268994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'Write-Time Based Memristive Physical Unclonable Function' [patent_app_type] => utility [patent_app_number] => 13/868529 [patent_app_country] => US [patent_app_date] => 2013-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4259 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13868529 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/868529
Write-Time Based Memristive Physical Unclonable Function Apr 22, 2013 Abandoned
Array ( [id] => 11637622 [patent_doc_number] => 09659602 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Voltage control integrated circuit devices' [patent_app_type] => utility [patent_app_number] => 14/241257 [patent_app_country] => US [patent_app_date] => 2013-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7221 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 447 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14241257 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/241257
Voltage control integrated circuit devices Apr 17, 2013 Issued
Array ( [id] => 9092739 [patent_doc_number] => 20130272050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'NON-VOLATILE MEMORY, SEMICONDUCTOR DEVICE AND READING METHOD' [patent_app_type] => utility [patent_app_number] => 13/860221 [patent_app_country] => US [patent_app_date] => 2013-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10545 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13860221 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/860221
Non-volatile memory, semiconductor device and reading method Apr 9, 2013 Issued
Array ( [id] => 15471199 [patent_doc_number] => 10551468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Failure detection apparatus for voltage sensor [patent_app_type] => utility [patent_app_number] => 14/651255 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3302 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 378 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14651255 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/651255
Failure detection apparatus for voltage sensor Apr 8, 2013 Issued
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